Richard Sandiford 30374b51cb [SystemZ] Try to fold shifts into TMxx ... E.g. "SRL %r2, 2; TMLL %r2, 1" => "TMLL %r2, 4". llvm-svn: 190672		2013-09-13 09:09:50 +00:00
..
AArch64	Implement aarch64 neon instruction set AdvSIMD (3V Diff), covering the following 26 instructions,	2013-09-09 02:20:27 +00:00
ARM	[ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode.	2013-09-09 14:21:49 +00:00
CPP
Generic
Hexagon	Debug Info Testing: use null instead of an empty string in context field.	2013-09-09 00:12:17 +00:00
Inputs	Debug Info: add an identifier field to DICompositeType.	2013-08-26 22:39:55 +00:00
Mips	[mips][msa] Added test cases that were supposed to be part of r190507, r190509, r190512, and r190518.	2013-09-11 12:39:25 +00:00
MSP430
NVPTX	[NVPTX] Re-enable assembly printing support for inline assembly	2013-08-24 01:17:23 +00:00
PowerPC	Remove unnecessary TBAA metadata from r190636's test case	2013-09-12 23:23:12 +00:00
R600	R600: Move code handling literal folding into R600ISelLowering.	2013-09-12 23:44:53 +00:00
SPARC	[Sparc] Correctly handle call to functions with ReturnsTwice attribute.	2013-09-05 05:32:16 +00:00
SystemZ	[SystemZ] Try to fold shifts into TMxx	2013-09-13 09:09:50 +00:00
Thumb	ARM: Use "dmb sy" for barriers on M-class CPUs	2013-08-28 14:39:19 +00:00
Thumb2	[ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode.	2013-09-09 14:21:49 +00:00
X86	AVX-512: implemented extractelement with variable index.	2013-09-12 08:55:00 +00:00
XCore	XCore handling of thread local lowering	2013-09-09 10:42:11 +00:00