1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 20:23:11 +01:00
llvm-mirror/test/MC/AMDGPU
Matt Arsenault 304779755d AMDGPU: Add cache invalidation instructions.
These are necessary for implementing mem_fence for
OpenCL 2.0.

The VI assembler tests are disabled since it seems to be
using the wrong encoding or opcode.

llvm-svn: 248532
2015-09-24 19:52:21 +00:00
..
buffer_wbinv1l_vol_vi.s AMDGPU: Add cache invalidation instructions. 2015-09-24 19:52:21 +00:00
ds-err.s
ds.s
flat.s
hsa_code_object_isa_noargs.s
hsa.s AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
lit.local.cfg
mubuf.s AMDGPU: Add cache invalidation instructions. 2015-09-24 19:52:21 +00:00
smrd.s AMDGPU/SI: Add support for 32-bit immediate SMRD offsets on CI 2015-08-06 19:28:38 +00:00
sop1-err.s
sop1.s
sop2.s
sopc.s
sopk.s
sopp.s
vop1.s
vop2-err.s AMDGPU/SI: Fix input vcc operand for VOP2b instructions 2015-09-08 21:15:00 +00:00
vop2.s AMDGPU/SI: Fix input vcc operand for VOP2b instructions 2015-09-08 21:15:00 +00:00
vop3-errs.s
vop3.s AMDGPU/SI: Use InstAlias instead of MnemonicAlias for VOPC instructions 2015-08-07 22:00:56 +00:00
vopc-errs.s AMDGPU/SI: Use InstAlias instead of MnemonicAlias for VOPC instructions 2015-08-07 22:00:56 +00:00
vopc.s AMDGPU/SI: Use InstAlias instead of MnemonicAlias for VOPC instructions 2015-08-07 22:00:56 +00:00