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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-24 13:33:37 +02:00
llvm-mirror/test/CodeGen
Simon Pilgrim 306c90b833 [X86][SSE] Fixed vector rotation test name typo
Rotation of 16i6 vector not 8i16 vector - copy+paste is not your friend

llvm-svn: 261733
2016-02-24 11:39:13 +00:00
..
AArch64 [AArch64] Generate csinv instruction more often 2016-02-23 19:34:13 +00:00
AMDGPU AMDGPU: Add failing testcase for register coalescer 2016-02-22 23:45:42 +00:00
ARM ARM: sink atomic release barrier as far as possible into cmpxchg. 2016-02-22 20:55:50 +00:00
BPF
CPP
Generic Revert r261070, it caused PR26652 / PR26653. 2016-02-17 18:47:29 +00:00
Hexagon [Hexagon] Implement TLS support 2016-02-18 15:42:57 +00:00
Inputs
Mips
MIR When printing MIR, output to errs() rather than outs(). 2016-02-19 00:18:46 +00:00
MSP430
NVPTX Don't tail-duplicate blocks that contain convergent instructions. 2016-02-22 17:50:52 +00:00
PowerPC Fix for PR26690 take 2 2016-02-22 18:04:00 +00:00
SPARC
SystemZ [SystemZ] Fix ABI for i128 argument and return types 2016-02-19 14:10:21 +00:00
Thumb
Thumb2
WebAssembly Revert "[WebAssembly] Stackify code emitted by eliminateFrameIndex" 2016-02-23 22:13:21 +00:00
WinEH [WinEH] Visit 'unwind to caller' catchswitches nested in catchswitches 2016-02-23 07:18:15 +00:00
X86 [X86][SSE] Fixed vector rotation test name typo 2016-02-24 11:39:13 +00:00
XCore