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Filling no-ops is done just before emitting of assembly, when the instruction stream is final. No-ops are inserted to align the instructions so the dual-issue of the pipeline is utilized. This speeds up generated code with a minimum of 1% on a select set of algorithms. This pass may be redundant if the instruction scheduler and all subsequent passes that modify the instruction stream (prolog+epilog inserter, register scavenger, are there others?) are made aware of the instruction alignments. llvm-svn: 123226
28 lines
822 B
CMake
28 lines
822 B
CMake
set(LLVM_TARGET_DEFINITIONS SPU.td)
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tablegen(SPUGenInstrNames.inc -gen-instr-enums)
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tablegen(SPUGenRegisterNames.inc -gen-register-enums)
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tablegen(SPUGenAsmWriter.inc -gen-asm-writer)
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tablegen(SPUGenCodeEmitter.inc -gen-emitter)
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tablegen(SPUGenRegisterInfo.h.inc -gen-register-desc-header)
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tablegen(SPUGenRegisterInfo.inc -gen-register-desc)
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tablegen(SPUGenInstrInfo.inc -gen-instr-desc)
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tablegen(SPUGenDAGISel.inc -gen-dag-isel)
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tablegen(SPUGenSubtarget.inc -gen-subtarget)
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tablegen(SPUGenCallingConv.inc -gen-callingconv)
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add_llvm_target(CellSPUCodeGen
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SPUAsmPrinter.cpp
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SPUHazardRecognizers.cpp
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SPUInstrInfo.cpp
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SPUISelDAGToDAG.cpp
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SPUISelLowering.cpp
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SPUFrameLowering.cpp
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SPUMCAsmInfo.cpp
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SPURegisterInfo.cpp
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SPUSubtarget.cpp
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SPUTargetMachine.cpp
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SPUSelectionDAGInfo.cpp
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SPUNopFiller.cpp
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)
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