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llvm-mirror/test/MC/X86/intel-syntax-x86-avx512dq_vl.s
Craig Topper ade431ac9b [X86] Allow assembly parser to accept x/y/z suffixes on non-memory vfpclassps/pd and on memory forms in intel syntax
The x/y/z suffix is needed to disambiguate the memory form in at&t syntax since no xmm/ymm/zmm register is mentioned.

But we should also allow it for the register and broadcast forms where its not needed for consistency. This matches gas.

The printing code will still only use the suffix for the memory form where it is needed.

llvm-svn: 359903
2019-05-03 16:15:15 +00:00

194 lines
7.7 KiB
ArmAsm

// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
// CHECK: vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7b,0x51,0x10]
vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 0x80]
// CHECK: vcvtps2qq xmm2 {k2}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7b,0x51,0x10]
vcvtps2qq xmm2 {k2}, qword ptr [rcx + 0x80]
// CHECK: vcvtps2qq xmm2, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7b,0x51,0x10]
vcvtps2qq xmm2, qword ptr [rcx + 0x80]
// CHECK: vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7a,0x49,0x10]
vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 0x80]
// CHECK: vcvttps2qq xmm1 {k2}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7a,0x49,0x10]
vcvttps2qq xmm1 {k2}, qword ptr [rcx + 0x80]
// CHECK: vcvttps2qq xmm1, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7a,0x49,0x10]
vcvttps2qq xmm1, qword ptr [rcx + 0x80]
// CHECK: vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x79,0x49,0x10]
vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
// CHECK: vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x79,0x49,0x10]
vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128]
// CHECK: vcvtps2uqq xmm1, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x79,0x49,0x10]
vcvtps2uqq xmm1, qword ptr [rcx + 128]
// CHECK: vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x78,0x49,0x10]
vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
// CHECK: vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10]
vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128]
// CHECK: vcvttps2uqq xmm1, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x78,0x49,0x10]
vcvttps2uqq xmm1, qword ptr [rcx + 128]
// CHECK: vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7b,0x51,0x10]
vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 0x80]
// CHECK: vcvtps2qq xmm2 {k2}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7b,0x51,0x10]
vcvtps2qq xmm2 {k2}, qword ptr [rcx + 0x80]
// CHECK: vcvtps2qq xmm2, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7b,0x51,0x10]
vcvtps2qq xmm2, qword ptr [rcx + 0x80]
// CHECK: vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7a,0x49,0x10]
vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 0x80]
// CHECK: vcvttps2qq xmm1 {k2}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7a,0x49,0x10]
vcvttps2qq xmm1 {k2}, qword ptr [rcx + 0x80]
// CHECK: vcvttps2qq xmm1, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7a,0x49,0x10]
vcvttps2qq xmm1, qword ptr [rcx + 0x80]
// CHECK: vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x79,0x49,0x10]
vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
// CHECK: vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x79,0x49,0x10]
vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128]
// CHECK: vcvtps2uqq xmm1, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x79,0x49,0x10]
vcvtps2uqq xmm1, qword ptr [rcx + 128]
// CHECK: vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x78,0x49,0x10]
vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128]
// CHECK: vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10]
vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128]
// CHECK: vcvttps2uqq xmm1, qword ptr [rcx + 128]
// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x78,0x49,0x10]
vcvttps2uqq xmm1, qword ptr [rcx + 128]
// CHECK: vfpclasspd k2, xmm18, 171
// CHECK: encoding: [0x62,0xb3,0xfd,0x08,0x66,0xd2,0xab]
vfpclasspd k2, xmm18, 0xab
// CHECK: vfpclasspd k2 {k7}, xmm18, 171
// CHECK: encoding: [0x62,0xb3,0xfd,0x0f,0x66,0xd2,0xab]
vfpclasspd k2 {k7}, xmm18, 0xab
// CHECK: vfpclasspd k2, xmmword ptr [rcx], 123
// CHECK: encoding: [0x62,0xf3,0xfd,0x08,0x66,0x11,0x7b]
vfpclasspd k2, xmmword ptr [rcx], 0x7b
// CHECK: vfpclasspd k2 {k7}, xmmword ptr [rcx], 123
// CHECK: encoding: [0x62,0xf3,0xfd,0x0f,0x66,0x11,0x7b]
vfpclasspd k2 {k7}, xmmword ptr [rcx], 0x7b
// CHECK: vfpclasspd k2, qword ptr [rcx]{1to2}, 123
// CHECK: encoding: [0x62,0xf3,0xfd,0x18,0x66,0x11,0x7b]
vfpclasspd k2, qword ptr [rcx]{1to2}, 0x7b
// CHECK: vfpclasspd k2 {k7}, qword ptr [rcx]{1to2}, 123
// CHECK: encoding: [0x62,0xf3,0xfd,0x1f,0x66,0x11,0x7b]
vfpclasspd k2 {k7}, qword ptr [rcx]{1to2}, 0x7b
// CHECK: vfpclassps k2, xmm18, 171
// CHECK: encoding: [0x62,0xb3,0x7d,0x08,0x66,0xd2,0xab]
vfpclassps k2, xmm18, 0xab
// CHECK: vfpclassps k2 {k7}, xmm18, 171
// CHECK: encoding: [0x62,0xb3,0x7d,0x0f,0x66,0xd2,0xab]
vfpclassps k2 {k7}, xmm18, 0xab
// CHECK: vfpclassps k2, xmmword ptr [rcx], 123
// CHECK: encoding: [0x62,0xf3,0x7d,0x08,0x66,0x11,0x7b]
vfpclassps k2, xmmword ptr [rcx], 0x7b
// CHECK: vfpclassps k2 {k7}, xmmword ptr [rcx], 123
// CHECK: encoding: [0x62,0xf3,0x7d,0x0f,0x66,0x11,0x7b]
vfpclassps k2 {k7}, xmmword ptr [rcx], 0x7b
// CHECK: vfpclassps k2, dword ptr [rcx]{1to4}, 123
// CHECK: encoding: [0x62,0xf3,0x7d,0x18,0x66,0x11,0x7b]
vfpclassps k2, dword ptr [rcx]{1to4}, 0x7b
// CHECK: vfpclassps k2 {k7}, dword ptr [rcx]{1to4}, 123
// CHECK: encoding: [0x62,0xf3,0x7d,0x1f,0x66,0x11,0x7b]
vfpclassps k2 {k7}, dword ptr [rcx]{1to4}, 0x7b
// CHECK: vfpclasspd k2, ymm18, 171
// CHECK: encoding: [0x62,0xb3,0xfd,0x28,0x66,0xd2,0xab]
vfpclasspd k2, ymm18, 0xab
// CHECK: vfpclasspd k2 {k7}, ymm18, 171
// CHECK: encoding: [0x62,0xb3,0xfd,0x2f,0x66,0xd2,0xab]
vfpclasspd k2 {k7}, ymm18, 0xab
// CHECK: vfpclasspd k2, ymmword ptr [rcx], 123
// CHECK: encoding: [0x62,0xf3,0xfd,0x28,0x66,0x11,0x7b]
vfpclasspd k2, ymmword ptr [rcx], 0x7b
// CHECK: vfpclasspd k2 {k7}, ymmword ptr [rcx], 123
// CHECK: encoding: [0x62,0xf3,0xfd,0x2f,0x66,0x11,0x7b]
vfpclasspd k2 {k7}, ymmword ptr [rcx], 0x7b
// CHECK: vfpclasspd k2, qword ptr [rcx]{1to4}, 123
// CHECK: encoding: [0x62,0xf3,0xfd,0x38,0x66,0x11,0x7b]
vfpclasspd k2, qword ptr [rcx]{1to4}, 0x7b
// CHECK: vfpclasspd k2 {k7}, qword ptr [rcx]{1to4}, 123
// CHECK: encoding: [0x62,0xf3,0xfd,0x3f,0x66,0x11,0x7b]
vfpclasspd k2 {k7}, qword ptr [rcx]{1to4}, 0x7b
// CHECK: vfpclassps k2, ymm18, 171
// CHECK: encoding: [0x62,0xb3,0x7d,0x28,0x66,0xd2,0xab]
vfpclassps k2, ymm18, 0xab
// CHECK: vfpclassps k2 {k7}, ymm18, 171
// CHECK: encoding: [0x62,0xb3,0x7d,0x2f,0x66,0xd2,0xab]
vfpclassps k2 {k7}, ymm18, 0xab
// CHECK: vfpclassps k2, ymmword ptr [rcx], 123
// CHECK: encoding: [0x62,0xf3,0x7d,0x28,0x66,0x11,0x7b]
vfpclassps k2, ymmword ptr [rcx], 0x7b
// CHECK: vfpclassps k2 {k7}, ymmword ptr [rcx], 123
// CHECK: encoding: [0x62,0xf3,0x7d,0x2f,0x66,0x11,0x7b]
vfpclassps k2 {k7}, ymmword ptr [rcx], 0x7b
// CHECK: vfpclassps k2, dword ptr [rcx]{1to8}, 123
// CHECK: encoding: [0x62,0xf3,0x7d,0x38,0x66,0x11,0x7b]
vfpclassps k2, dword ptr [rcx]{1to8}, 0x7b
// CHECK: vfpclassps k2 {k7}, dword ptr [rcx]{1to8}, 123
// CHECK: encoding: [0x62,0xf3,0x7d,0x3f,0x66,0x11,0x7b]
vfpclassps k2 {k7}, dword ptr [rcx]{1to8}, 0x7b