mirror of
https://github.com/RPCS3/llvm-mirror.git
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5fba38a9da
Caller saved regs differ between SysV and Win64. Use the tail call available set to scavenge from. Refactor register info to create new helper to get at tail call GPRs. Added a new test case for windows. Fixed up a number of X64 tests since now RCX is preferred over RDX on SysV. Differential Revision: http://reviews.llvm.org/D14878 llvm-svn: 253927
348 lines
7.7 KiB
LLVM
348 lines
7.7 KiB
LLVM
; RUN: llc < %s -emulated-tls -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32 %s
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; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64 %s
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; RUN: llc < %s -emulated-tls -march=x86 -mtriple=x86-linux-android | FileCheck -check-prefix=X32 %s
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; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-android | FileCheck -check-prefix=X64 %s
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; Copied from tls.ll; emulated TLS model is not implemented
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; for *-pc-win32 and *-pc-winows targets yet.
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; Use my_emutls_get_address like __emutls_get_address.
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@my_emutls_v_xyz = external global i8*, align 4
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declare i8* @my_emutls_get_address(i8*)
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define i32 @my_get_xyz() {
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; X32-LABEL: my_get_xyz:
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; X32: movl $my_emutls_v_xyz, (%esp)
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; X32-NEXT: calll my_emutls_get_address
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; X32-NEXT: movl (%eax), %eax
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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; X64-LABEL: my_get_xyz:
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; X64: movl $my_emutls_v_xyz, %edi
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; X64-NEXT: callq my_emutls_get_address
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; X64-NEXT: movl (%rax), %eax
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; X64-NEXT: popq %rcx
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; X64-NEXT: retq
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entry:
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%call = call i8* @my_emutls_get_address(i8* bitcast (i8** @my_emutls_v_xyz to i8*))
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%0 = bitcast i8* %call to i32*
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%1 = load i32, i32* %0, align 4
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ret i32 %1
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}
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@i1 = thread_local global i32 15
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@i2 = external thread_local global i32
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@i3 = internal thread_local global i32 15
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@i4 = hidden thread_local global i32 15
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@i5 = external hidden thread_local global i32
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@s1 = thread_local global i16 15
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@b1 = thread_local global i8 0
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define i32 @f1() {
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; X32-LABEL: f1:
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; X32: movl $__emutls_v.i1, (%esp)
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; X32-NEXT: calll __emutls_get_address
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; X32-NEXT: movl (%eax), %eax
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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; X64-LABEL: f1:
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; X64: movl $__emutls_v.i1, %edi
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; X64-NEXT: callq __emutls_get_address
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; X64-NEXT: movl (%rax), %eax
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; X64-NEXT: popq %rcx
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; X64-NEXT: retq
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entry:
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%tmp1 = load i32, i32* @i1
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ret i32 %tmp1
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}
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define i32* @f2() {
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; X32-LABEL: f2:
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; X32: movl $__emutls_v.i1, (%esp)
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; X32-NEXT: calll __emutls_get_address
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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; X64-LABEL: f2:
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; X64: movl $__emutls_v.i1, %edi
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; X64-NEXT: callq __emutls_get_address
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; X64-NEXT: popq %rcx
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; X64-NEXT: retq
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entry:
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ret i32* @i1
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}
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define i32 @f3() nounwind {
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; X32-LABEL: f3:
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; X32: movl $__emutls_v.i2, (%esp)
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; X32-NEXT: calll __emutls_get_address
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; X32-NEXT: movl (%eax), %eax
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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entry:
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%tmp1 = load i32, i32* @i2
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ret i32 %tmp1
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}
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define i32* @f4() {
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; X32-LABEL: f4:
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; X32: movl $__emutls_v.i2, (%esp)
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; X32-NEXT: calll __emutls_get_address
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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entry:
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ret i32* @i2
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}
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define i32 @f5() nounwind {
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; X32-LABEL: f5:
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; X32: movl $__emutls_v.i3, (%esp)
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; X32-NEXT: calll __emutls_get_address
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; X32-NEXT: movl (%eax), %eax
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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entry:
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%tmp1 = load i32, i32* @i3
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ret i32 %tmp1
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}
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define i32* @f6() {
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; X32-LABEL: f6:
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; X32: movl $__emutls_v.i3, (%esp)
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; X32-NEXT: calll __emutls_get_address
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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entry:
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ret i32* @i3
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}
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define i32 @f7() {
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; X32-LABEL: f7:
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; X32: movl $__emutls_v.i4, (%esp)
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; X32-NEXT: calll __emutls_get_address
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; X32-NEXT: movl (%eax), %eax
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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entry:
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%tmp1 = load i32, i32* @i4
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ret i32 %tmp1
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}
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define i32* @f8() {
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; X32-LABEL: f8:
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; X32: movl $__emutls_v.i4, (%esp)
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; X32-NEXT: calll __emutls_get_address
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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entry:
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ret i32* @i4
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}
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define i32 @f9() {
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; X32-LABEL: f9:
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; X32: movl $__emutls_v.i5, (%esp)
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; X32-NEXT: calll __emutls_get_address
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; X32-NEXT: movl (%eax), %eax
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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entry:
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%tmp1 = load i32, i32* @i5
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ret i32 %tmp1
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}
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define i32* @f10() {
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; X32-LABEL: f10:
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; X32: movl $__emutls_v.i5, (%esp)
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; X32-NEXT: calll __emutls_get_address
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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entry:
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ret i32* @i5
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}
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define i16 @f11() {
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; X32-LABEL: f11:
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; X32: movl $__emutls_v.s1, (%esp)
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; X32-NEXT: calll __emutls_get_address
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; X32-NEXT: movzwl (%eax), %eax
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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entry:
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%tmp1 = load i16, i16* @s1
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ret i16 %tmp1
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}
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define i32 @f12() {
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; X32-LABEL: f12:
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; X32: movl $__emutls_v.s1, (%esp)
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; X32-NEXT: calll __emutls_get_address
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; X32-NEXT: movswl (%eax), %eax
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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entry:
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%tmp1 = load i16, i16* @s1
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%tmp2 = sext i16 %tmp1 to i32
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ret i32 %tmp2
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}
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define i8 @f13() {
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; X32-LABEL: f13:
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; X32: movl $__emutls_v.b1, (%esp)
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; X32-NEXT: calll __emutls_get_address
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; X32-NEXT: movb (%eax), %al
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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entry:
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%tmp1 = load i8, i8* @b1
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ret i8 %tmp1
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}
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define i32 @f14() {
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; X32-LABEL: f14:
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; X32: movl $__emutls_v.b1, (%esp)
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; X32-NEXT: calll __emutls_get_address
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; X32-NEXT: movsbl (%eax), %eax
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: retl
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entry:
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%tmp1 = load i8, i8* @b1
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%tmp2 = sext i8 %tmp1 to i32
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ret i32 %tmp2
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}
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;;;;;;;;;;;;;; 32-bit __emutls_v. and __emutls_t.
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; X32 .section .data.rel.local,
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; X32-LABEL: __emutls_v.i1:
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; X32-NEXT: .long 4
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; X32-NEXT: .long 4
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; X32-NEXT: .long 0
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; X32-NEXT: .long __emutls_t.i1
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; X32 .section .rodata,
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; X32-LABEL: __emutls_t.i1:
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; X32-NEXT: .long 15
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; X32-NOT: __emutls_v.i2
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; X32 .section .data.rel.local,
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; X32-LABEL: __emutls_v.i3:
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; X32-NEXT: .long 4
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; X32-NEXT: .long 4
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; X32-NEXT: .long 0
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; X32-NEXT: .long __emutls_t.i3
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; X32 .section .rodata,
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; X32-LABEL: __emutls_t.i3:
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; X32-NEXT: .long 15
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; X32 .section .data.rel.local,
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; X32-LABEL: __emutls_v.i4:
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; X32-NEXT: .long 4
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; X32-NEXT: .long 4
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; X32-NEXT: .long 0
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; X32-NEXT: .long __emutls_t.i4
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; X32 .section .rodata,
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; X32-LABEL: __emutls_t.i4:
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; X32-NEXT: .long 15
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; X32-NOT: __emutls_v.i5:
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; X32 .hidden __emutls_v.i5
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; X32-NOT: __emutls_v.i5:
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; X32 .section .data.rel.local,
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; X32-LABEL: __emutls_v.s1:
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; X32-NEXT: .long 2
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; X32-NEXT: .long 2
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; X32-NEXT: .long 0
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; X32-NEXT: .long __emutls_t.s1
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; X32 .section .rodata,
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; X32-LABEL: __emutls_t.s1:
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; X32-NEXT: .short 15
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; X32 .section .data.rel.local,
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; X32-LABEL: __emutls_v.b1:
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; X32-NEXT: .long 1
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; X32-NEXT: .long 1
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; X32-NEXT: .long 0
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; X32-NEXT: .long 0
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; X32-NOT: __emutls_t.b1
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;;;;;;;;;;;;;; 64-bit __emutls_v. and __emutls_t.
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; X64 .section .data.rel.local,
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; X64-LABEL: __emutls_v.i1:
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; X64-NEXT: .quad 4
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; X64-NEXT: .quad 4
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; X64-NEXT: .quad 0
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; X64-NEXT: .quad __emutls_t.i1
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; X64 .section .rodata,
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; X64-LABEL: __emutls_t.i1:
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; X64-NEXT: .long 15
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; X64-NOT: __emutls_v.i2
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; X64 .section .data.rel.local,
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; X64-LABEL: __emutls_v.i3:
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; X64-NEXT: .quad 4
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; X64-NEXT: .quad 4
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; X64-NEXT: .quad 0
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; X64-NEXT: .quad __emutls_t.i3
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; X64 .section .rodata,
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; X64-LABEL: __emutls_t.i3:
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; X64-NEXT: .long 15
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; X64 .section .data.rel.local,
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; X64-LABEL: __emutls_v.i4:
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; X64-NEXT: .quad 4
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; X64-NEXT: .quad 4
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; X64-NEXT: .quad 0
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; X64-NEXT: .quad __emutls_t.i4
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; X64 .section .rodata,
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; X64-LABEL: __emutls_t.i4:
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; X64-NEXT: .long 15
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; X64-NOT: __emutls_v.i5:
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; X64 .hidden __emutls_v.i5
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; X64-NOT: __emutls_v.i5:
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; X64 .section .data.rel.local,
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; X64-LABEL: __emutls_v.s1:
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; X64-NEXT: .quad 2
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; X64-NEXT: .quad 2
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; X64-NEXT: .quad 0
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; X64-NEXT: .quad __emutls_t.s1
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; X64 .section .rodata,
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; X64-LABEL: __emutls_t.s1:
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; X64-NEXT: .short 15
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; X64 .section .data.rel.local,
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; X64-LABEL: __emutls_v.b1:
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; X64-NEXT: .quad 1
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; X64-NEXT: .quad 1
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; X64-NEXT: .quad 0
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; X64-NEXT: .quad 0
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; X64-NOT: __emutls_t.b1
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