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319cba0069
Change the syntax to use `%0.sub8` to denote a subregister. This seems like a more natural fit to denote subregisters; I also plan to introduce a new ":classname" syntax in upcoming patches to denote the register class of a vreg. Note that this commit disallows plain identifiers to start with a '.' character. This shouldn't affect anything as external names/IR references are all prefixed with '$'/'%', plain identifiers are only used for instruction names, register mask names and subreg indexes. Differential Revision: https://reviews.llvm.org/D22390 llvm-svn: 276815
28 lines
521 B
YAML
28 lines
521 B
YAML
# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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--- |
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define zeroext i1 @t(i1 %c) {
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entry:
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ret i1 %c
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}
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...
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---
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name: t
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isSSA: true
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gr32 }
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- { id: 1, class: gr8 }
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- { id: 2, class: gr8 }
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body: |
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bb.0.entry:
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%0 = COPY %edi
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; CHECK: [[@LINE+1]]:20: expected a subregister index after '.'
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%1 = COPY %0 . 42
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%2 = AND8ri %1, 1, implicit-def %eflags
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%al = COPY %2
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RETQ %al
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...
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