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5f6f8101d5
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt llvm-svn: 72897
19 lines
909 B
LLVM
19 lines
909 B
LLVM
; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | grep li.*16
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; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | not grep addi
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; Codegen lvx (R+16) as t = li 16, lvx t,R
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; This shares the 16 between the two loads.
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define void @func(<4 x float>* %a, <4 x float>* %b) {
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%tmp1 = getelementptr <4 x float>* %b, i32 1 ; <<4 x float>*> [#uses=1]
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%tmp = load <4 x float>* %tmp1 ; <<4 x float>> [#uses=1]
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%tmp3 = getelementptr <4 x float>* %a, i32 1 ; <<4 x float>*> [#uses=1]
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%tmp4 = load <4 x float>* %tmp3 ; <<4 x float>> [#uses=1]
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%tmp5 = fmul <4 x float> %tmp, %tmp4 ; <<4 x float>> [#uses=1]
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%tmp8 = load <4 x float>* %b ; <<4 x float>> [#uses=1]
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%tmp9 = fadd <4 x float> %tmp5, %tmp8 ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp9, <4 x float>* %a
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ret void
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}
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