Akira Hatanaka 5706262bc2 When constant double 0.0 is lowered, make sure 0 is copied directly from an ... integer register to a floating point register. It is not valid to interpret the value of a floating pointer register as part of a double precision floating point value after a single precision floating point computational or move instruction stores its result to the register. - In the test case, the following code is generated before this patch is applied: mtc1 $zero, $f2 ; unformatted copy to $f2 mov.s $f0, $f2 ; $f0 is in single format sdc1 $f12, 0($sp) mov.s $f1, $f2 ; $f1 is in single format c.eq.d $f12, $f0 ; $f0 cannot be interpreted as double - The following code is generated after this patch is applied: mtc1 $zero, $f0 ; unformatted copy to $f0 mtc1 $zero, $f1 ; unformatted copy to $f1 c.eq.d $f12, $f0 ; $f0 can be interpreted as double Bhanu Chetlapalli and Chris Dearman at MIPS technologies reported this bug and provided the test case. llvm-svn: 137484		2011-08-12 18:09:59 +00:00
..
InstPrinter	Rewrite the CMake build to use explicit dependencies between libraries,	2011-07-29 00:14:25 +00:00
MCTargetDesc	Rewrite the CMake build to use explicit dependencies between libraries,	2011-07-29 00:14:25 +00:00
TargetInfo	Actually finish switching to the new system for Target sublibrary	2011-08-01 19:55:11 +00:00
CMakeLists.txt	Rewrite the CMake build to use explicit dependencies between libraries,	2011-07-29 00:14:25 +00:00
Makefile	Next round of MC refactoring. This patch factor MC table instantiations, MC	2011-07-14 20:59:42 +00:00
Mips.h	Added the infrastructute necessary for MIPS JIT support. Patch by Vladimir	2011-07-21 16:28:51 +00:00
Mips.td	Lower MachineInstr to MC Inst and print to .s files.	2011-07-07 23:56:50 +00:00
MipsAsmPrinter.cpp	Separate MCInstPrinter registration from AsmPrinter registration.	2011-07-25 21:20:24 +00:00
MipsAsmPrinter.h	Lower MachineInstr to MC Inst and print to .s files.	2011-07-07 23:56:50 +00:00
MipsCallingConv.td	Add A0 and A1 to the list of registers used for returning a value in order to	2011-06-21 01:28:11 +00:00
MipsCodeEmitter.cpp	Added the infrastructute necessary for MIPS JIT support. Patch by Vladimir	2011-07-21 16:28:51 +00:00
MipsDelaySlotFiller.cpp	- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and	2011-06-28 19:10:37 +00:00
MipsEmitGPRestore.cpp	Reverse order of operands of address operand mem so that the base operand comes	2011-07-07 18:57:00 +00:00
MipsExpandPseudo.cpp	- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and	2011-06-28 19:10:37 +00:00
MipsFrameLowering.cpp	Enclose directive .cprestore with .set macro and nomacro to silence assembler	2011-08-11 22:42:31 +00:00
MipsFrameLowering.h	Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for	2011-07-18 22:29:13 +00:00
MipsInstrFormats.td	Fix td file comments for Mips.	2011-05-09 18:16:46 +00:00
MipsInstrFPU.td	Use tabs to separate opcode and operand strings.	2011-06-07 18:16:51 +00:00
MipsInstrInfo.cpp	Next round of MC refactoring. This patch factor MC table instantiations, MC	2011-07-14 20:59:42 +00:00
MipsInstrInfo.h	Lower MachineInstr to MC Inst and print to .s files.	2011-07-07 23:56:50 +00:00
MipsInstrInfo.td	Add isIndirectBranch flag.	2011-08-11 21:05:37 +00:00
MipsISelDAGToDAG.cpp	When constant double 0.0 is lowered, make sure 0 is copied directly from an	2011-08-12 18:09:59 +00:00
MipsISelLowering.cpp	New approach to r136737: insert the necessary fences for atomic ops in platform-independent code, since a bunch of platforms (ARM, Mips, PPC, Alpha are the relevant targets here) need to do essentially the same thing.	2011-08-03 21:06:02 +00:00
MipsISelLowering.h	Code generation for 'fence' instruction.	2011-07-27 22:21:52 +00:00
MipsJITInfo.cpp	Added the infrastructute necessary for MIPS JIT support. Patch by Vladimir	2011-07-21 16:28:51 +00:00
MipsJITInfo.h	Added the infrastructute necessary for MIPS JIT support. Patch by Vladimir	2011-07-21 16:28:51 +00:00
MipsMachineFunction.h	Set mayLoad or mayStore flags for SC and LL in order to prevent LICM from	2011-07-18 18:52:12 +00:00
MipsMCInstLower.cpp	Raise assertion when MachineOperand has unexpected target flag.	2011-07-08 00:42:35 +00:00
MipsMCInstLower.h	Define class MipsMCInstLower.	2011-07-07 20:24:54 +00:00
MipsMCSymbolRefExpr.cpp	Define class MipsMCSymbolRefExpr.	2011-07-07 19:27:22 +00:00
MipsMCSymbolRefExpr.h	Define class MipsMCSymbolRefExpr.	2011-07-07 19:27:22 +00:00
MipsRegisterInfo.cpp	Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for	2011-07-18 22:29:13 +00:00
MipsRegisterInfo.h	Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down	2011-07-18 20:57:22 +00:00
MipsRegisterInfo.td	Use set operations instead of plain lists to enumerate register classes.	2011-06-15 23:28:14 +00:00
MipsRelocations.h	Added the infrastructute necessary for MIPS JIT support. Patch by Vladimir	2011-07-21 16:28:51 +00:00
MipsSchedule.td	Reverse unnecessary changes made in r129606 and r129608. There is no change in functionality.	2011-04-15 21:51:11 +00:00
MipsSelectionDAGInfo.cpp	Reverse unnecessary changes made in r129606 and r129608. There is no change in functionality.	2011-04-15 21:51:11 +00:00
MipsSelectionDAGInfo.h	Reverse unnecessary changes made in r129606 and r129608. There is no change in functionality.	2011-04-15 21:51:11 +00:00
MipsSubtarget.cpp	Next round of MC refactoring. This patch factor MC table instantiations, MC	2011-07-14 20:59:42 +00:00
MipsSubtarget.h	Compute feature bits at time of MCSubtargetInfo initialization.	2011-07-07 07:07:08 +00:00
MipsTargetMachine.cpp	Added the infrastructute necessary for MIPS JIT support. Patch by Vladimir	2011-07-21 16:28:51 +00:00
MipsTargetMachine.h	Added the infrastructute necessary for MIPS JIT support. Patch by Vladimir	2011-07-21 16:28:51 +00:00
MipsTargetObjectFile.cpp	land David Blaikie's patch to de-constify Type, with a few tweaks.	2011-07-18 04:54:35 +00:00
MipsTargetObjectFile.h	Reverse unnecessary changes made in r129606 and r129608. There is no change in functionality.	2011-04-15 21:51:11 +00:00