Yichao Yu b55be14233 Fix R_AARCH64_MOVW_UABS_G3 relocation ... Summary: The relocation is missing mask so an address that has non-zero bits in 47:43 may overwrite the register number. (Frequently shows up as target register changed to `xzr`....) Reviewers: t.p.northover, lhames Subscribers: davide, aemerson, rengolin, llvm-commits Differential Revision: https://reviews.llvm.org/D27609 llvm-svn: 289880		2016-12-15 22:36:53 +00:00
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Interpreter
MCJIT	[RuntimeDyld] Move an X86 only test to the correct directory.	2016-11-02 21:05:42 +00:00
OrcLazy	[ORC] Clone module flags metadata into the globals module in the	2016-09-04 17:53:30 +00:00
OrcMCJIT	Remove the JIT EH/small code model tests for now.	2016-10-19 22:19:38 +00:00
RuntimeDyld	Fix R_AARCH64_MOVW_UABS_G3 relocation	2016-12-15 22:36:53 +00:00
2010-01-15-UndefValue.ll
fma3-jit.ll
frem.ll
lit.local.cfg
mov64zext32.ll
test-interp-vec-arithm_float.ll
test-interp-vec-arithm_int.ll
test-interp-vec-cast.ll
test-interp-vec-insertelement.ll
test-interp-vec-insertextractvalue.ll
test-interp-vec-loadstore.ll
test-interp-vec-logical.ll
test-interp-vec-select.ll
test-interp-vec-setcond-fp.ll
test-interp-vec-setcond-int.ll
test-interp-vec-shift.ll
test-interp-vec-shuffle.ll