1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
llvm-mirror/include/llvm/Target
Sanjay Patel c095454ca2 Split the estimate() interface into separate functions for each type. NFC.
It was hacky to use an opcode as a switch because it won't always match
(rsqrte != sqrte), and it looks like we'll need to add more special casing
per arch than I had hoped for. Eg, x86 will prefer a different NR estimate
implementation. ARM will want to use it's 'step' instructions. There also
don't appear to be any new estimate instructions in any arch in a long,
long time. Altivec vloge and vexpte may have been the first and last in
that field...

llvm-svn: 218698
2014-09-30 20:28:48 +00:00
..
CostTable.h
Target.td Add isInsertSubreg property. 2014-08-20 23:49:36 +00:00
TargetCallingConv.h ARM: HFAs must be passed in consecutive registers 2014-05-09 14:01:47 +00:00
TargetCallingConv.td [mips] Add CCValAssign::[ASZ]ExtUpper and CCPromoteToUpperBitsInType and handle struct's correctly on big-endian N32/N64 return values. 2014-09-25 12:15:05 +00:00
TargetFrameLowering.h Re-apply r211399, "Generate native unwind info on Win64" with a fix to ignore SEH pseudo ops in X86 JIT emitter. 2014-06-25 12:41:52 +00:00
TargetInstrInfo.h Fix a lot of confusion around inserting nops on empty functions. 2014-09-15 18:32:58 +00:00
TargetIntrinsicInfo.h Trailing whitespace. 2014-07-23 00:42:52 +00:00
TargetItinerary.td
TargetLibraryInfo.h Trailing whitespace. 2014-07-23 00:42:52 +00:00
TargetLowering.h Split the estimate() interface into separate functions for each type. NFC. 2014-09-30 20:28:48 +00:00
TargetLoweringObjectFile.h CodeGen: Stick constant pool entries in COMDAT sections for WinCOFF 2014-07-14 22:57:27 +00:00
TargetMachine.h Target: Fix build breakage. 2014-09-26 02:57:05 +00:00
TargetOpcodes.h [stack protector] Fix a potential security bug in stack protector where the 2014-07-25 19:31:34 +00:00
TargetOptions.h Satiate the sanitizer build bot 2014-08-21 20:09:15 +00:00
TargetRegisterInfo.h [RegisterCoalescer] Moving the RegisterCoalescer subtarget hook onto the TargetRegisterInfo instead of the TargetSubtargetInfo. 2014-07-16 20:13:31 +00:00
TargetSchedule.td Move Post RA Scheduling flag bit into SchedMachineModel 2014-07-15 22:39:58 +00:00
TargetSelectionDAG.td Add SDAG TableGen definitions for BR_CC 2014-09-25 23:34:18 +00:00
TargetSelectionDAGInfo.h Trailing whitespace. 2014-07-23 00:42:52 +00:00
TargetSubtargetInfo.h Remove resetSubtargetFeatures as it is unused. 2014-09-03 20:36:31 +00:00