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5d66f81412
phi cycles. Adjust a few tests to keep dead instructions from being optimized away. This (together with my previous change for phi cycles) fixes Apple radar 7627077. llvm-svn: 96057
36 lines
1.2 KiB
LLVM
36 lines
1.2 KiB
LLVM
; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \
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; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1
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@current_surfaces.b = external global i1 ; <i1*> [#uses=1]
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declare double @asin(double) nounwind readonly
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declare double @tan(double) nounwind readonly
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define fastcc void @trace_line(i32 %line) nounwind {
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entry:
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%.b3 = load i1* @current_surfaces.b ; <i1> [#uses=1]
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br i1 %.b3, label %bb, label %return
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bb: ; preds = %bb9.i, %entry
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%.rle4 = phi double [ %7, %bb9.i ], [ 0.000000e+00, %entry ] ; <double> [#uses=1]
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%0 = load double* null, align 8 ; <double> [#uses=3]
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%1 = fcmp une double %0, 0.000000e+00 ; <i1> [#uses=1]
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br i1 %1, label %bb9.i, label %bb13.i
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bb9.i: ; preds = %bb
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%2 = fsub double %.rle4, %0 ; <double> [#uses=0]
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%3 = tail call double @asin(double %.rle4) nounwind readonly ; <double> [#uses=0]
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%4 = fmul double 0.000000e+00, %0 ; <double> [#uses=1]
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%5 = tail call double @tan(double 0.000000e+00) nounwind readonly ; <double> [#uses=0]
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%6 = fmul double %4, 0.000000e+00 ; <double> [#uses=1]
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%7 = fadd double %6, 0.000000e+00 ; <double> [#uses=1]
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br i1 false, label %return, label %bb
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bb13.i: ; preds = %bb
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unreachable
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return: ; preds = %bb9.i, %entry
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ret void
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}
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