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This patch enables the machine outliner for RISC-V and adds the necessary logic for checking whether sequences can be safely outlined, and describing how they should be outlined. Outlined functions are called using the register t0 (x5) as the return address register, which must be available for an occurrence of a sequence to be safely outlined. Differential Revision: https://reviews.llvm.org/D66210 |
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| .. | ||
| Analysis | ||
| Assembler | ||
| Bindings | ||
| Bitcode | ||
| BugPoint | ||
| CodeGen | ||
| DebugInfo | ||
| Demangle | ||
| Examples | ||
| ExecutionEngine | ||
| Feature | ||
| FileCheck | ||
| Instrumentation | ||
| Integer | ||
| JitListener | ||
| Linker | ||
| LTO | ||
| MachineVerifier | ||
| MC | ||
| Object | ||
| ObjectYAML | ||
| Other | ||
| Reduce | ||
| SafepointIRVerifier | ||
| Support | ||
| SymbolRewriter | ||
| TableGen | ||
| ThinLTO/X86 | ||
| tools | ||
| Transforms | ||
| Unit | ||
| Verifier | ||
| YAMLParser | ||
| .clang-format | ||
| CMakeLists.txt | ||
| lit.cfg.py | ||
| lit.site.cfg.py.in | ||
| TestRunner.sh | ||