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076a6683eb
We've been running doxygen with the autobrief option for a couple of years now. This makes the \brief markers into our comments redundant. Since they are a visual distraction and we don't want to encourage more \brief markers in new code either, this patch removes them all. Patch produced by for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done Differential Revision: https://reviews.llvm.org/D46290 llvm-svn: 331272
98 lines
2.8 KiB
C++
98 lines
2.8 KiB
C++
//===-- WebAssemblyUtilities.cpp - WebAssembly Utility Functions ----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file implements several utility functions for WebAssembly.
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///
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//===----------------------------------------------------------------------===//
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#include "WebAssemblyUtilities.h"
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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using namespace llvm;
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bool WebAssembly::isArgument(const MachineInstr &MI) {
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switch (MI.getOpcode()) {
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case WebAssembly::ARGUMENT_I32:
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case WebAssembly::ARGUMENT_I64:
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case WebAssembly::ARGUMENT_F32:
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case WebAssembly::ARGUMENT_F64:
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case WebAssembly::ARGUMENT_v16i8:
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case WebAssembly::ARGUMENT_v8i16:
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case WebAssembly::ARGUMENT_v4i32:
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case WebAssembly::ARGUMENT_v4f32:
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return true;
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default:
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return false;
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}
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}
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bool WebAssembly::isCopy(const MachineInstr &MI) {
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switch (MI.getOpcode()) {
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case WebAssembly::COPY_I32:
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case WebAssembly::COPY_I64:
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case WebAssembly::COPY_F32:
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case WebAssembly::COPY_F64:
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return true;
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default:
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return false;
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}
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}
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bool WebAssembly::isTee(const MachineInstr &MI) {
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switch (MI.getOpcode()) {
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case WebAssembly::TEE_I32:
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case WebAssembly::TEE_I64:
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case WebAssembly::TEE_F32:
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case WebAssembly::TEE_F64:
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return true;
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default:
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return false;
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}
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}
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/// Test whether MI is a child of some other node in an expression tree.
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bool WebAssembly::isChild(const MachineInstr &MI,
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const WebAssemblyFunctionInfo &MFI) {
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if (MI.getNumOperands() == 0)
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return false;
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const MachineOperand &MO = MI.getOperand(0);
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if (!MO.isReg() || MO.isImplicit() || !MO.isDef())
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return false;
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unsigned Reg = MO.getReg();
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return TargetRegisterInfo::isVirtualRegister(Reg) &&
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MFI.isVRegStackified(Reg);
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}
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bool WebAssembly::isCallIndirect(const MachineInstr &MI) {
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switch (MI.getOpcode()) {
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case WebAssembly::CALL_INDIRECT_VOID:
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case WebAssembly::CALL_INDIRECT_I32:
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case WebAssembly::CALL_INDIRECT_I64:
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case WebAssembly::CALL_INDIRECT_F32:
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case WebAssembly::CALL_INDIRECT_F64:
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case WebAssembly::CALL_INDIRECT_v16i8:
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case WebAssembly::CALL_INDIRECT_v8i16:
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case WebAssembly::CALL_INDIRECT_v4i32:
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case WebAssembly::CALL_INDIRECT_v4f32:
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return true;
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default:
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return false;
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}
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}
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MachineBasicBlock *llvm::LoopBottom(const MachineLoop *Loop) {
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MachineBasicBlock *Bottom = Loop->getHeader();
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for (MachineBasicBlock *MBB : Loop->blocks())
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if (MBB->getNumber() > Bottom->getNumber())
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Bottom = MBB;
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return Bottom;
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}
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