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llvm-mirror/test/CodeGen/ARM/2009-11-02-NegativeLane.ll
Bob Wilson 586811b244 Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements
so that it will continue to test what it was meant to test when I commit a
separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon.
Fix a DAG combiner crash exposed by this test change.

llvm-svn: 104380
2010-05-21 21:05:32 +00:00

21 lines
778 B
LLVM

; RUN: llc -mcpu=cortex-a8 < %s | grep vdup.16
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "armv7-eabi"
define arm_aapcs_vfpcc void @foo(i8* nocapture %pBuffer, i32 %numItems) nounwind {
entry:
br i1 undef, label %return, label %bb
bb: ; preds = %bb, %entry
%0 = load i16* undef, align 2
%1 = insertelement <8 x i16> undef, i16 %0, i32 2
%2 = insertelement <8 x i16> %1, i16 undef, i32 3
%3 = mul <8 x i16> %2, %2
%4 = extractelement <8 x i16> %3, i32 2
store i16 %4, i16* undef, align 2
br i1 undef, label %return, label %bb
return: ; preds = %bb, %entry
ret void
}