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llvm-mirror/test
Eli Friedman 6944a84c4d [AArch64][SVE] Implement extractelement of i1 vectors.
The implementation just extends the vector to a larger element type, and
extracts from that.  Not fancy, but generates reasonable code.

There was discussion in the review of doing the promotion in
target-independent code, but I'm sticking with this to avoid making
LegalizeDAG infrastructure more complicated.

Differential Revision: https://reviews.llvm.org/D87651
2021-05-17 14:51:11 -07:00
..
Analysis [RISCV][NFC] Correct alignment in scatter/gather tests 2021-05-17 15:12:55 +01:00
Assembler
Bindings
Bitcode IR/AArch64/X86: add "swifttailcc" calling convention. 2021-05-17 10:48:34 +01:00
BugPoint
CodeGen [AArch64][SVE] Implement extractelement of i1 vectors. 2021-05-17 14:51:11 -07:00
DebugInfo [Transforms][Debugify] Fix "Missing line" false alarm on PHI nodes 2021-05-14 14:06:13 +02:00
Demangle [Demangle][Rust] Parse trait definitions 2021-05-15 23:52:25 +02:00
Examples
ExecutionEngine
Feature
FileCheck
Instrumentation Remove (unneeded) '-asan-use-after-return' from hoist-argument-init-insts.ll. 2021-05-14 11:55:23 -07:00
Integer
JitListener
Linker
LTO
MachineVerifier
MC [AMDGPU] Set unused dst_sel to '?' in the encoding 2021-05-17 08:38:52 -07:00
Object
ObjectYAML
Other [Matrix] Fix some newpm check lines, which fail on some bots. (2) 2021-05-16 14:11:18 +01:00
SafepointIRVerifier
Support
SymbolRewriter
TableGen
ThinLTO/X86
tools [X86][Atom] Fix vector integer multiplication resource/throughputs 2021-05-15 14:25:48 +01:00
Transforms Do actual DCE in LoopUnroll (try 3) 2021-05-17 14:47:02 -07:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg.py
lit.site.cfg.py.in
TestRunner.sh