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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
llvm-mirror/test/CodeGen
Florian Hahn 33c25892dc [AArch64] Be more careful to skip debug operands in LdSt Optimizier.
This fixes crashes with $noreg operands.
2019-12-11 18:47:45 +00:00
..
AArch64 [AArch64] Be more careful to skip debug operands in LdSt Optimizier. 2019-12-11 18:47:45 +00:00
AMDGPU [MBP] Avoid tail duplication if it can't bring benefit 2019-12-06 09:53:53 -08:00
ARC
ARM [LegalizeTypes] Bugfixes for big-endian targets when handling BITCASTs 2019-12-10 11:22:35 +01:00
AVR
BPF [BPF] put not-section-attribute externs into BTF ".extern" data section 2019-12-10 11:45:17 -08:00
Generic
Hexagon
Inputs
Lanai
Mips Handle BUNDLE instructions in MipsAsmPrinter 2019-12-04 11:30:00 +00:00
MIR [llvm][MIRVRegNamerUtil] Adding hashing against MachineInstr flags. 2019-12-10 20:16:14 -05:00
MSP430
NVPTX
PowerPC [PowerPC][NFC] add test case for lwa - loop ds form prep 2019-12-11 06:10:11 -05:00
RISCV [RISCV] Fix mir-target-flags.ll 2019-12-09 13:51:08 +00:00
SPARC Temporarily run machine-verifier once in test/CodeGen/SPARC/fp128.ll, so that 2019-12-03 11:21:52 +01:00
SystemZ [SystemZ] Add llvm.minimum / llvm.maximum tests 2019-12-11 17:01:13 +01:00
Thumb Revert "ARM-Darwin: keep the frame register reserved even if not updated." 2019-12-06 10:59:26 -08:00
Thumb2 [ARM][NFC] Change test to use CHECK-NEXT 2019-12-11 14:25:36 +00:00
WebAssembly
WinCFGuard
WinEH
X86 [SDAG] remove use restriction in isNegatibleForFree() when called from getNegatedExpression() 2019-12-11 13:30:39 -05:00
XCore