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3633380341
Summary: In SelectionDAG, when a store is immediately chained to another store to the same address, elide the first store as it has no observable effects. This is causes small improvements dealing with intrinsics lowered to stores. Test notes: * Many testcases overwrite store addresses multiple times and needed minor changes, mainly making stores volatile to prevent the optimization from optimizing the test away. * Many X86 test cases optimized out instructions associated with associated with va_start. * Note that test_splat in CodeGen/AArch64/misched-stp.ll no longer has dependencies to check and can probably be removed and potentially replaced with another test. Reviewers: rnk, john.brawn Subscribers: aemerson, rengolin, qcolombet, jyknight, nemanjai, nhaehnle, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D33206 llvm-svn: 303198
72 lines
2.7 KiB
LLVM
72 lines
2.7 KiB
LLVM
; RUN: llc -mtriple=aarch64 -mcpu=cortex-a53 < %s | FileCheck %s
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; Tests to check that zero stores which are generated as STP xzr, xzr aren't
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; scheduled incorrectly due to incorrect alias information
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1)
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%struct.tree_common = type { i8*, i8*, i32 }
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; Original test case which exhibited the bug
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define void @test1(%struct.tree_common* %t, i32 %code, i8* %type) {
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; CHECK-LABEL: test1:
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; CHECK-DAG: stp x2, xzr, [x0, #8]
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; CHECK-DAG: str w1, [x0, #16]
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; CHECK-DAG: str xzr, [x0]
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entry:
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%0 = bitcast %struct.tree_common* %t to i8*
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tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 24, i32 8, i1 false)
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%code1 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 2
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store i32 %code, i32* %code1, align 8
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%type2 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 1
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store i8* %type, i8** %type2, align 8
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ret void
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}
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; Store to each struct element instead of using memset
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define void @test2(%struct.tree_common* %t, i32 %code, i8* %type) {
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; CHECK-LABEL: test2:
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; CHECK-DAG: str w1, [x0, #16]
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; CHECK-DAG: stp xzr, x2, [x0]
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entry:
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%0 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 0
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%1 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 1
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%2 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 2
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store i8* zeroinitializer, i8** %0, align 8
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store i8* zeroinitializer, i8** %1, align 8
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store i32 zeroinitializer, i32* %2, align 8
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store i32 %code, i32* %2, align 8
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store i8* %type, i8** %1, align 8
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ret void
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}
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; Vector store instead of memset
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define void @test3(%struct.tree_common* %t, i32 %code, i8* %type) {
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; CHECK-LABEL: test3:
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; CHECK-DAG: stp x2, xzr, [x0, #8]
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; CHECK-DAG: str w1, [x0, #16]
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; CHECK-DAG: str xzr, [x0]
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entry:
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%0 = bitcast %struct.tree_common* %t to <3 x i64>*
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store <3 x i64> zeroinitializer, <3 x i64>* %0, align 8
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%code1 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 2
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store i32 %code, i32* %code1, align 8
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%type2 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 1
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store i8* %type, i8** %type2, align 8
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ret void
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}
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; Vector store, then store to vector elements
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define void @test4(<3 x i64>* %p, i64 %x, i64 %y) {
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; CHECK-LABEL: test4:
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; CHECK-DAG: stp x2, x1, [x0, #8]
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; CHECK-DAG: str xzr, [x0]
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entry:
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store <3 x i64> zeroinitializer, <3 x i64>* %p, align 8
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%0 = bitcast <3 x i64>* %p to i64*
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%1 = getelementptr inbounds i64, i64* %0, i64 2
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store i64 %x, i64* %1, align 8
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%2 = getelementptr inbounds i64, i64* %0, i64 1
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store i64 %y, i64* %2, align 8
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ret void
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}
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