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3cd29893c0
Add support for s.d instruction for Mips1 which expands into two swc1 instructions. Patch by Mirko Brkusanin. Differential Revision: https://reviews.llvm.org/D63199 llvm-svn: 363184
14 lines
549 B
ArmAsm
14 lines
549 B
ArmAsm
# RUN: llvm-mc -filetype=obj -triple mips -mcpu=mips1 %s -o - \
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# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=MIPS1-EB
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# RUN: llvm-mc -filetype=obj -triple mipsel -mcpu=mips1 %s -o - \
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# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=MIPS1-EL
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# Check if s.d instruction alias is suported on Mips1.
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# MIPS1-EB: 0: e4 c1 00 00 swc1 $f1, 0($6)
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# MIPS1-EB: 4: e4 c0 00 04 swc1 $f0, 4($6)
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# MIPS1-EL: 0: 00 00 c0 e4 swc1 $f0, 0($6)
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# MIPS1-EL: 4: 04 00 c1 e4 swc1 $f1, 4($6)
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s.d $f0, 0($6)
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