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277138a332
This is causing compilation timeouts on code with long sequences of local values and calls (i.e. foo(1); foo(2); foo(3); ...). It turns out that code coverage instrumentation is a great way to create sequences like this, which how our users ran into the issue in practice. Intel has a tool that detects these kinds of non-linear compile time issues, and Andy Kaylor reported it as PR37010. The current sinking code scans the whole basic block once per local value sink, which happens before emitting each call. In theory, local values should only be introduced to be used by instructions between the current flush point and the last flush point, so we should only need to scan those instructions. llvm-svn: 329822
48 lines
1.8 KiB
LLVM
48 lines
1.8 KiB
LLVM
; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
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; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM
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; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
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define i32 @VarArg() nounwind {
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entry:
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%i = alloca i32, align 4
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%j = alloca i32, align 4
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%k = alloca i32, align 4
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%m = alloca i32, align 4
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%n = alloca i32, align 4
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%tmp = alloca i32, align 4
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%0 = load i32, i32* %i, align 4
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%1 = load i32, i32* %j, align 4
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%2 = load i32, i32* %k, align 4
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%3 = load i32, i32* %m, align 4
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%4 = load i32, i32* %n, align 4
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; ARM: VarArg
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; ARM: mov [[FP:r[0-9]+]], sp
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; ARM: sub sp, sp, #{{(36|40)}}
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; ARM: ldr r1, {{\[}}[[FP]], #-4]
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; ARM: ldr r2, {{\[}}[[FP]], #-8]
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; ARM: ldr r3, {{\[}}[[FP]], #-12]
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; ARM: ldr [[Ra:r[0-9]+]], {{\[}}[[FP]], #-16]
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; ARM: ldr [[Rb:[lr]+[0-9]*]], [sp, #{{(16|20)}}]
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; ARM: movw [[Rc:[lr]+[0-9]*]], #5
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; Ra got spilled
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; ARM: mov r0, [[Rc]]
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; ARM: str {{.*}}, [sp]
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; ARM: str [[Rb]], [sp, #4]
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; ARM: bl {{_?CallVariadic}}
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; THUMB: sub sp, #{{36}}
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; THUMB: ldr r1, [sp, #32]
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; THUMB: ldr r2, [sp, #28]
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; THUMB: ldr r3, [sp, #24]
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; THUMB: ldr {{[a-z0-9]+}}, [sp, #20]
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; THUMB: ldr.w {{[a-z0-9]+}}, [sp, #16]
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; THUMB: str.w {{[a-z0-9]+}}, [sp]
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; THUMB: str.w {{[a-z0-9]+}}, [sp, #4]
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; THUMB: bl {{_?}}CallVariadic
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%call = call i32 (i32, ...) @CallVariadic(i32 5, i32 %0, i32 %1, i32 %2, i32 %3, i32 %4)
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store i32 %call, i32* %tmp, align 4
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%5 = load i32, i32* %tmp, align 4
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ret i32 %5
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}
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declare i32 @CallVariadic(i32, ...)
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