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351 lines
7.9 KiB
LLVM
351 lines
7.9 KiB
LLVM
; RUN: opt < %s -msan -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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; Check the presence of __msan_init
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; CHECK: @llvm.global_ctors {{.*}} @__msan_init
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; load followed by cmp: check that we load the shadow and call __msan_warning.
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define void @LoadAndCmp(i32* nocapture %a) nounwind uwtable {
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entry:
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%0 = load i32* %a, align 4
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%tobool = icmp eq i32 %0, 0
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br i1 %tobool, label %if.end, label %if.then
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if.then: ; preds = %entry
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tail call void (...)* @foo() nounwind
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br label %if.end
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if.end: ; preds = %entry, %if.then
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ret void
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}
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declare void @foo(...)
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; CHECK: @LoadAndCmp
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; CHECK: = load
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; CHECK: = load
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; CHECK: call void @__msan_warning_noreturn()
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; CHECK-NEXT: call void asm sideeffect
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; CHECK-NEXT: unreachable
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; CHECK: ret void
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; Check that we store the shadow for the retval.
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define i32 @ReturnInt() nounwind uwtable readnone {
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entry:
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ret i32 123
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}
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; CHECK: @ReturnInt
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; CHECK: store i32 0,{{.*}}__msan_retval_tls
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; CHECK: ret i32
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; Check that we get the shadow for the retval.
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define void @CopyRetVal(i32* nocapture %a) nounwind uwtable {
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entry:
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%call = tail call i32 @ReturnInt() nounwind
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store i32 %call, i32* %a, align 4
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ret void
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}
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; CHECK: @CopyRetVal
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; CHECK: load{{.*}}__msan_retval_tls
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; CHECK: store
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; CHECK: store
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; CHECK: ret void
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; Check that we generate PHIs for shadow.
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define void @FuncWithPhi(i32* nocapture %a, i32* %b, i32* nocapture %c) nounwind uwtable {
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entry:
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%tobool = icmp eq i32* %b, null
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br i1 %tobool, label %if.else, label %if.then
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if.then: ; preds = %entry
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%0 = load i32* %b, align 4
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br label %if.end
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if.else: ; preds = %entry
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%1 = load i32* %c, align 4
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br label %if.end
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if.end: ; preds = %if.else, %if.then
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%t.0 = phi i32 [ %0, %if.then ], [ %1, %if.else ]
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store i32 %t.0, i32* %a, align 4
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ret void
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}
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; CHECK: @FuncWithPhi
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; CHECK: = phi
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; CHECK-NEXT: = phi
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; CHECK: store
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; CHECK: store
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; CHECK: ret void
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; Compute shadow for "x << 10"
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define void @ShlConst(i32* nocapture %x) nounwind uwtable {
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entry:
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%0 = load i32* %x, align 4
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%1 = shl i32 %0, 10
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store i32 %1, i32* %x, align 4
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ret void
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}
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; CHECK: @ShlConst
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; CHECK: = load
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; CHECK: = load
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; CHECK: shl
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; CHECK: shl
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; CHECK: store
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; CHECK: store
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; CHECK: ret void
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; Compute shadow for "10 << x": it should have 'sext i1'.
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define void @ShlNonConst(i32* nocapture %x) nounwind uwtable {
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entry:
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%0 = load i32* %x, align 4
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%1 = shl i32 10, %0
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store i32 %1, i32* %x, align 4
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ret void
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}
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; CHECK: @ShlNonConst
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; CHECK: = load
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; CHECK: = load
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; CHECK: = sext i1
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; CHECK: store
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; CHECK: store
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; CHECK: ret void
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; SExt
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define void @SExt(i32* nocapture %a, i16* nocapture %b) nounwind uwtable {
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entry:
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%0 = load i16* %b, align 2
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%1 = sext i16 %0 to i32
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store i32 %1, i32* %a, align 4
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ret void
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}
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; CHECK: @SExt
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; CHECK: = load
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; CHECK: = load
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; CHECK: = sext
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; CHECK: = sext
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; CHECK: store
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; CHECK: store
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; CHECK: ret void
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; memset
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define void @MemSet(i8* nocapture %x) nounwind uwtable {
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entry:
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call void @llvm.memset.p0i8.i64(i8* %x, i8 42, i64 10, i32 1, i1 false)
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ret void
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}
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
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; CHECK: @MemSet
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; CHECK: call i8* @__msan_memset
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; CHECK: ret void
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; memcpy
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define void @MemCpy(i8* nocapture %x, i8* nocapture %y) nounwind uwtable {
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entry:
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* %x, i8* %y, i64 10, i32 1, i1 false)
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ret void
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}
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
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; CHECK: @MemCpy
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; CHECK: call i8* @__msan_memcpy
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; CHECK: ret void
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; memmove is lowered to a call
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define void @MemMove(i8* nocapture %x, i8* nocapture %y) nounwind uwtable {
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entry:
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call void @llvm.memmove.p0i8.p0i8.i64(i8* %x, i8* %y, i64 10, i32 1, i1 false)
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ret void
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}
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declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
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; CHECK: @MemMove
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; CHECK: call i8* @__msan_memmove
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; CHECK: ret void
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; Check that we propagate shadow for "select"
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define i32 @Select(i32 %a, i32 %b, i32 %c) nounwind uwtable readnone {
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entry:
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%tobool = icmp ne i32 %c, 0
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%cond = select i1 %tobool, i32 %a, i32 %b
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ret i32 %cond
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}
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; CHECK: @Select
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; CHECK: select
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; CHECK-NEXT: select
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; CHECK: ret i32
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define i8* @IntToPtr(i64 %x) nounwind uwtable readnone {
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entry:
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%0 = inttoptr i64 %x to i8*
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ret i8* %0
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}
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; CHECK: @IntToPtr
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; CHECK: load i64*{{.*}}__msan_param_tls
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; CHECK-NEXT: inttoptr
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; CHECK-NEXT: store i64{{.*}}__msan_retval_tls
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; CHECK: ret i8
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define i8* @IntToPtr_ZExt(i16 %x) nounwind uwtable readnone {
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entry:
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%0 = inttoptr i16 %x to i8*
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ret i8* %0
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}
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; CHECK: @IntToPtr_ZExt
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; CHECK: zext
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; CHECK-NEXT: inttoptr
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; CHECK: ret i8
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; Check that we insert exactly one check on udiv
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; (2nd arg shadow is checked, 1st arg shadow is propagated)
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define i32 @Div(i32 %a, i32 %b) nounwind uwtable readnone {
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entry:
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%div = udiv i32 %a, %b
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ret i32 %div
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}
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; CHECK: @Div
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; CHECK: icmp
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; CHECK: call void @__msan_warning
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; CHECK-NOT: icmp
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; CHECK: udiv
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; CHECK-NOT: icmp
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; CHECK: ret i32
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; Check that we propagate shadow for x<0, x>=0, etc (i.e. sign bit tests)
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define zeroext i1 @ICmpSLT(i32 %x) nounwind uwtable readnone {
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%1 = icmp slt i32 %x, 0
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ret i1 %1
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}
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; CHECK: @ICmpSLT
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; CHECK: icmp slt
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; CHECK-NOT: call void @__msan_warning
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; CHECK: icmp slt
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; CHECK-NOT: call void @__msan_warning
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; CHECK: ret i1
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define zeroext i1 @ICmpSGE(i32 %x) nounwind uwtable readnone {
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%1 = icmp sge i32 %x, 0
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ret i1 %1
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}
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; CHECK: @ICmpSGE
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; CHECK: icmp slt
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; CHECK-NOT: call void @__msan_warning
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; CHECK: icmp sge
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; CHECK-NOT: call void @__msan_warning
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; CHECK: ret i1
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define zeroext i1 @ICmpSGT(i32 %x) nounwind uwtable readnone {
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%1 = icmp sgt i32 0, %x
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ret i1 %1
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}
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; CHECK: @ICmpSGT
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; CHECK: icmp slt
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; CHECK-NOT: call void @__msan_warning
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; CHECK: icmp sgt
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; CHECK-NOT: call void @__msan_warning
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; CHECK: ret i1
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define zeroext i1 @ICmpSLE(i32 %x) nounwind uwtable readnone {
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%1 = icmp sle i32 0, %x
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ret i1 %1
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}
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; CHECK: @ICmpSLE
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; CHECK: icmp slt
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; CHECK-NOT: call void @__msan_warning
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; CHECK: icmp sle
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; CHECK-NOT: call void @__msan_warning
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; CHECK: ret i1
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; Check that loads from shadow have the same aligment as the original loads.
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define i32 @ShadowLoadAlignmentLarge() nounwind uwtable {
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%y = alloca i32, align 64
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%1 = load volatile i32* %y, align 64
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ret i32 %1
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}
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; CHECK: @ShadowLoadAlignmentLarge
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; CHECK: load i32* {{.*}} align 64
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; CHECK: load volatile i32* {{.*}} align 64
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; CHECK: ret i32
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define i32 @ShadowLoadAlignmentSmall() nounwind uwtable {
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%y = alloca i32, align 2
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%1 = load volatile i32* %y, align 2
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ret i32 %1
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}
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; CHECK: @ShadowLoadAlignmentSmall
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; CHECK: load i32* {{.*}} align 2
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; CHECK: load volatile i32* {{.*}} align 2
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; CHECK: ret i32
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; Test vector manipulation instructions.
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; Check that the same bit manipulation is applied to the shadow values.
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; Check that there is a zero test of the shadow of %idx argument, where present.
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define i32 @ExtractElement(<4 x i32> %vec, i32 %idx) {
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%x = extractelement <4 x i32> %vec, i32 %idx
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ret i32 %x
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}
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; CHECK: @ExtractElement
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; CHECK: extractelement
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; CHECK: call void @__msan_warning
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; CHECK: extractelement
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; CHECK: ret i32
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define <4 x i32> @InsertElement(<4 x i32> %vec, i32 %idx, i32 %x) {
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%vec1 = insertelement <4 x i32> %vec, i32 %x, i32 %idx
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ret <4 x i32> %vec1
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}
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; CHECK: @InsertElement
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; CHECK: insertelement
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; CHECK: call void @__msan_warning
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; CHECK: insertelement
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; CHECK: ret <4 x i32>
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define <4 x i32> @ShuffleVector(<4 x i32> %vec, <4 x i32> %vec1) {
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%vec2 = shufflevector <4 x i32> %vec, <4 x i32> %vec1,
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<4 x i32> <i32 0, i32 4, i32 1, i32 5>
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ret <4 x i32> %vec2
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}
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; CHECK: @ShuffleVector
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; CHECK: shufflevector
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; CHECK-NOT: call void @__msan_warning
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; CHECK: shufflevector
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; CHECK: ret <4 x i32>
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