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a1b968ec45
where possible. llvm-svn: 181817
36 lines
736 B
LLVM
36 lines
736 B
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv5 -O3 < %s | FileCheck %s
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; Check that we combine TFRs and TFRIs into COMBINEs.
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@a = external global i16
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@b = external global i16
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@c = external global i16
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; Function Attrs: nounwind
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define i64 @test1() #0 {
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; CHECK: combine(#10, #0)
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entry:
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store i16 0, i16* @a, align 2
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store i16 10, i16* @b, align 2
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ret i64 10
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}
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; Function Attrs: nounwind
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define i64 @test2() #0 {
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; CHECK: combine(#0, r{{[0-9]+}})
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entry:
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store i16 0, i16* @a, align 2
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%0 = load i16* @c, align 2
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%conv2 = zext i16 %0 to i64
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ret i64 %conv2
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}
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; Function Attrs: nounwind
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define i64 @test4() #0 {
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; CHECK: combine(#0, ##100)
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entry:
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store i16 100, i16* @b, align 2
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store i16 0, i16* @a, align 2
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ret i64 0
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}
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