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36a2243ab7
Introduced new target-independent intrinsics in order to support masked vector loads and stores. The loop vectorizer optimizes loops containing conditional memory accesses by generating these intrinsics for existing targets AVX2 and AVX-512. The vectorizer asks the target about availability of masked vector loads and stores. Added SDNodes for masked operations and lowering patterns for X86 code generator. Examples: <16 x i32> @llvm.masked.load.v16i32(i8* %addr, <16 x i32> %passthru, i32 4 /* align */, <16 x i1> %mask) declare void @llvm.masked.store.v8f64(i8* %addr, <8 x double> %value, i32 4, <8 x i1> %mask) Scalarizer for other targets (not AVX2/AVX-512) will be done in a separate patch. http://reviews.llvm.org/D6191 llvm-svn: 222632 |
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ADT | ||
Analysis | ||
AsmParser | ||
Bitcode | ||
CodeGen | ||
Config | ||
DebugInfo | ||
ExecutionEngine | ||
IR | ||
IRReader | ||
LineEditor | ||
Linker | ||
LTO | ||
MC | ||
Object | ||
Option | ||
ProfileData | ||
Support | ||
TableGen | ||
Target | ||
Transforms | ||
CMakeLists.txt | ||
InitializePasses.h | ||
LinkAllIR.h | ||
LinkAllPasses.h | ||
module.modulemap | ||
module.modulemap.build | ||
Pass.h | ||
PassAnalysisSupport.h | ||
PassInfo.h | ||
PassManager.h | ||
PassRegistry.h | ||
PassSupport.h |