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189b3ff9a1
Re-commit r303937 + r303949 as they were not the cause for the build failures. We do not track liveness of reserved registers so adding them to the liveins list in computeLiveIns() was completely unnecessary. llvm-svn: 303970
209 lines
8.0 KiB
C++
209 lines
8.0 KiB
C++
//===-- BranchFolding.h - Fold machine code branch instructions -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_CODEGEN_BRANCHFOLDING_H
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#define LLVM_LIB_CODEGEN_BRANCHFOLDING_H
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/CodeGen/LivePhysRegs.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/Support/BlockFrequency.h"
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#include <vector>
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namespace llvm {
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class MachineBlockFrequencyInfo;
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class MachineBranchProbabilityInfo;
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class MachineFunction;
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class MachineModuleInfo;
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class MachineLoopInfo;
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class TargetInstrInfo;
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class TargetRegisterInfo;
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class LLVM_LIBRARY_VISIBILITY BranchFolder {
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public:
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class MBFIWrapper;
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explicit BranchFolder(bool defaultEnableTailMerge,
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bool CommonHoist,
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MBFIWrapper &MBFI,
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const MachineBranchProbabilityInfo &MBPI,
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// Min tail length to merge. Defaults to commandline
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// flag. Ignored for optsize.
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unsigned MinCommonTailLength = 0);
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/// Perhaps branch folding, tail merging and other CFG optimizations on the
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/// given function. Block placement changes the layout and may create new
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/// tail merging opportunities.
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bool OptimizeFunction(MachineFunction &MF, const TargetInstrInfo *tii,
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const TargetRegisterInfo *tri, MachineModuleInfo *mmi,
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MachineLoopInfo *mli = nullptr,
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bool AfterPlacement = false);
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private:
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class MergePotentialsElt {
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unsigned Hash;
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MachineBasicBlock *Block;
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public:
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MergePotentialsElt(unsigned h, MachineBasicBlock *b)
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: Hash(h), Block(b) {}
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unsigned getHash() const { return Hash; }
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MachineBasicBlock *getBlock() const { return Block; }
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void setBlock(MachineBasicBlock *MBB) {
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Block = MBB;
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}
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bool operator<(const MergePotentialsElt &) const;
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};
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typedef std::vector<MergePotentialsElt>::iterator MPIterator;
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std::vector<MergePotentialsElt> MergePotentials;
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SmallPtrSet<const MachineBasicBlock*, 2> TriedMerging;
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DenseMap<const MachineBasicBlock *, int> FuncletMembership;
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class SameTailElt {
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MPIterator MPIter;
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MachineBasicBlock::iterator TailStartPos;
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public:
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SameTailElt(MPIterator mp, MachineBasicBlock::iterator tsp)
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: MPIter(mp), TailStartPos(tsp) {}
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MPIterator getMPIter() const {
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return MPIter;
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}
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MergePotentialsElt &getMergePotentialsElt() const {
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return *getMPIter();
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}
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MachineBasicBlock::iterator getTailStartPos() const {
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return TailStartPos;
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}
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unsigned getHash() const {
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return getMergePotentialsElt().getHash();
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}
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MachineBasicBlock *getBlock() const {
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return getMergePotentialsElt().getBlock();
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}
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bool tailIsWholeBlock() const {
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return TailStartPos == getBlock()->begin();
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}
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void setBlock(MachineBasicBlock *MBB) {
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getMergePotentialsElt().setBlock(MBB);
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}
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void setTailStartPos(MachineBasicBlock::iterator Pos) {
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TailStartPos = Pos;
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}
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};
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std::vector<SameTailElt> SameTails;
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bool AfterBlockPlacement;
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bool EnableTailMerge;
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bool EnableHoistCommonCode;
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bool UpdateLiveIns;
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unsigned MinCommonTailLength;
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const TargetInstrInfo *TII;
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const MachineRegisterInfo *MRI;
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const TargetRegisterInfo *TRI;
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MachineModuleInfo *MMI;
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MachineLoopInfo *MLI;
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LivePhysRegs LiveRegs;
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public:
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/// \brief This class keeps track of branch frequencies of newly created
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/// blocks and tail-merged blocks.
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class MBFIWrapper {
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public:
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MBFIWrapper(const MachineBlockFrequencyInfo &I) : MBFI(I) {}
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BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const;
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void setBlockFreq(const MachineBasicBlock *MBB, BlockFrequency F);
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raw_ostream &printBlockFreq(raw_ostream &OS,
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const MachineBasicBlock *MBB) const;
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raw_ostream &printBlockFreq(raw_ostream &OS,
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const BlockFrequency Freq) const;
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void view(const Twine &Name, bool isSimple = true);
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uint64_t getEntryFreq() const;
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private:
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const MachineBlockFrequencyInfo &MBFI;
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DenseMap<const MachineBasicBlock *, BlockFrequency> MergedBBFreq;
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};
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private:
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MBFIWrapper &MBBFreqInfo;
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const MachineBranchProbabilityInfo &MBPI;
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bool TailMergeBlocks(MachineFunction &MF);
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bool TryTailMergeBlocks(MachineBasicBlock* SuccBB,
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MachineBasicBlock* PredBB,
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unsigned MinCommonTailLength);
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void setCommonTailEdgeWeights(MachineBasicBlock &TailMBB);
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/// Delete the instruction OldInst and everything after it, replacing it
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/// with an unconditional branch to NewDest.
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void ReplaceTailWithBranchTo(MachineBasicBlock::iterator OldInst,
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MachineBasicBlock *NewDest);
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/// Given a machine basic block and an iterator into it, split the MBB so
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/// that the part before the iterator falls into the part starting at the
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/// iterator. This returns the new MBB.
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MachineBasicBlock *SplitMBBAt(MachineBasicBlock &CurMBB,
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MachineBasicBlock::iterator BBI1,
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const BasicBlock *BB);
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/// Look through all the blocks in MergePotentials that have hash CurHash
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/// (guaranteed to match the last element). Build the vector SameTails of
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/// all those that have the (same) largest number of instructions in common
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/// of any pair of these blocks. SameTails entries contain an iterator into
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/// MergePotentials (from which the MachineBasicBlock can be found) and a
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/// MachineBasicBlock::iterator into that MBB indicating the instruction
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/// where the matching code sequence begins. Order of elements in SameTails
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/// is the reverse of the order in which those blocks appear in
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/// MergePotentials (where they are not necessarily consecutive).
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unsigned ComputeSameTails(unsigned CurHash, unsigned minCommonTailLength,
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MachineBasicBlock *SuccBB,
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MachineBasicBlock *PredBB);
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/// Remove all blocks with hash CurHash from MergePotentials, restoring
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/// branches at ends of blocks as appropriate.
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void RemoveBlocksWithHash(unsigned CurHash, MachineBasicBlock* SuccBB,
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MachineBasicBlock* PredBB);
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/// None of the blocks to be tail-merged consist only of the common tail.
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/// Create a block that does by splitting one.
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bool CreateCommonTailOnlyBlock(MachineBasicBlock *&PredBB,
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MachineBasicBlock *SuccBB,
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unsigned maxCommonTailLength,
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unsigned &commonTailIndex);
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/// Create merged DebugLocs of identical instructions across SameTails and
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/// assign it to the instruction in common tail.
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void MergeCommonTailDebugLocs(unsigned commonTailIndex);
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bool OptimizeBranches(MachineFunction &MF);
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/// Analyze and optimize control flow related to the specified block. This
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/// is never called on the entry block.
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bool OptimizeBlock(MachineBasicBlock *MBB);
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/// Remove the specified dead machine basic block from the function,
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/// updating the CFG.
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void RemoveDeadBlock(MachineBasicBlock *MBB);
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/// Hoist common instruction sequences at the start of basic blocks to their
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/// common predecessor.
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bool HoistCommonCode(MachineFunction &MF);
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/// If the successors of MBB has common instruction sequence at the start of
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/// the function, move the instructions before MBB terminator if it's legal.
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bool HoistCommonCodeInSuccs(MachineBasicBlock *MBB);
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};
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}
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#endif /* LLVM_CODEGEN_BRANCHFOLDING_HPP */
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