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2f13163a84
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090
23 lines
880 B
LLVM
23 lines
880 B
LLVM
; RUN: llc -mtriple=arm64-apple-ios < %s | FileCheck %s
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; RUN: llc -mtriple=arm64-linux-gnu -relocation-model=pic < %s | FileCheck %s --check-prefix=CHECK-LINUX
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; <rdar://problem/11392109>
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define hidden void @t() optsize ssp {
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entry:
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store i64 zext (i32 ptrtoint (i64 (i32)* @x to i32) to i64), i64* undef, align 8
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; CHECK: adrp x{{[0-9]+}}, _x@GOTPAGE
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; CHECK: ldr x{{[0-9]+}}, [x{{[0-9]+}}, _x@GOTPAGEOFF]
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; CHECK-NEXT: and x{{[0-9]+}}, x{{[0-9]+}}, #0xffffffff
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; CHECK-NEXT: str x{{[0-9]+}}, [x{{[0-9]+}}]
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unreachable
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}
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declare i64 @x(i32) optsize
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; Worth checking the Linux code is sensible too: only way to access
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; the GOT is via a 64-bit load. Just loading wN is unacceptable
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; (there's no ELF relocation to do that).
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; CHECK-LINUX: adrp {{x[0-9]+}}, :got:x
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; CHECK-LINUX: ldr {{x[0-9]+}}, [{{x[0-9]+}}, :got_lo12:x]
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