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2f13163a84
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090
36 lines
921 B
LLVM
36 lines
921 B
LLVM
; RUN: llc -mtriple=arm64-apple-ios -O0 %s -o - | FileCheck %s
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; Fast-isel can't do vector conversions yet, but it was emitting some highly
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; suspect UCVTFUWDri MachineInstrs.
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define <4 x float> @test_uitofp(<4 x i32> %in) {
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; CHECK-LABEL: test_uitofp:
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; CHECK: ucvtf.4s v0, v0
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%res = uitofp <4 x i32> %in to <4 x float>
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ret <4 x float> %res
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}
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define <2 x double> @test_sitofp(<2 x i32> %in) {
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; CHECK-LABEL: test_sitofp:
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; CHECK: sshll.2d [[EXT:v[0-9]+]], v0, #0
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; CHECK: scvtf.2d v0, [[EXT]]
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%res = sitofp <2 x i32> %in to <2 x double>
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ret <2 x double> %res
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}
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define <2 x i32> @test_fptoui(<2 x float> %in) {
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; CHECK-LABEL: test_fptoui:
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; CHECK: fcvtzu.2s v0, v0
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%res = fptoui <2 x float> %in to <2 x i32>
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ret <2 x i32> %res
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}
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define <2 x i64> @test_fptosi(<2 x double> %in) {
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; CHECK-LABEL: test_fptosi:
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; CHECK: fcvtzs.2d v0, v0
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%res = fptosi <2 x double> %in to <2 x i64>
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ret <2 x i64> %res
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} |