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2f13163a84
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090
28 lines
943 B
LLVM
28 lines
943 B
LLVM
; RUN: llc -march=arm64 -verify-machineinstrs < %s | FileCheck %s
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; We used to not mark NZCV as being used in the continuation basic-block
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; when lowering a 128-bit "select" to branches. This meant a subsequent use
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; of the same flags gave an internal fault here.
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declare void @foo(fp128)
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define double @test_f128csel_flags(i32 %lhs, fp128 %a, fp128 %b, double %l, double %r) nounwind {
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; CHECK: test_f128csel_flags
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%tst = icmp ne i32 %lhs, 42
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%val = select i1 %tst, fp128 %a, fp128 %b
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; CHECK: cmp w0, #42
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; CHECK: b.eq {{.?LBB0}}
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call void @foo(fp128 %val)
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%retval = select i1 %tst, double %l, double %r
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; It's also reasonably important that the actual fcsel comes before the
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; function call since bl may corrupt NZCV. We were doing the right thing anyway,
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; but just as well test it while we're here.
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; CHECK: fcsel {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, ne
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; CHECK: bl {{_?foo}}
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ret double %retval
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}
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