mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-24 11:42:57 +01:00
2f13163a84
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090
19 lines
616 B
LLVM
19 lines
616 B
LLVM
; RUN: llc -O0 -mtriple=arm64-none-linux-gnu -relocation-model=pic -verify-machineinstrs < %s | FileCheck %s
|
|
|
|
; If the .tlsdesccall and blr parts are emitted completely separately (even with
|
|
; glue) then LLVM will separate them quite happily (with a spill at O0, hence
|
|
; the option). This is definitely wrong, so we make sure they are emitted
|
|
; together.
|
|
|
|
@general_dynamic_var = external thread_local global i32
|
|
|
|
define i32 @test_generaldynamic() {
|
|
; CHECK-LABEL: test_generaldynamic:
|
|
|
|
%val = load i32* @general_dynamic_var
|
|
ret i32 %val
|
|
|
|
; CHECK: .tlsdesccall general_dynamic_var
|
|
; CHECK-NEXT: blr {{x[0-9]+}}
|
|
}
|