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dd9ab77318
Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
139 lines
5.0 KiB
LLVM
139 lines
5.0 KiB
LLVM
; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=+half-rate-64-ops < %s | FileCheck %s
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; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck %s
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; CHECK: 'add_i32'
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; CHECK: estimated cost of 1 for {{.*}} add i32
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define amdgpu_kernel void @add_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
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%vec = load i32, i32 addrspace(1)* %vaddr
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%add = add i32 %vec, %b
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store i32 %add, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: 'add_v2i32'
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; CHECK: estimated cost of 2 for {{.*}} add <2 x i32>
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define amdgpu_kernel void @add_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %vaddr, <2 x i32> %b) #0 {
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%vec = load <2 x i32>, <2 x i32> addrspace(1)* %vaddr
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%add = add <2 x i32> %vec, %b
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store <2 x i32> %add, <2 x i32> addrspace(1)* %out
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ret void
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}
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; CHECK: 'add_v3i32'
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; CHECK: estimated cost of 3 for {{.*}} add <3 x i32>
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define amdgpu_kernel void @add_v3i32(<3 x i32> addrspace(1)* %out, <3 x i32> addrspace(1)* %vaddr, <3 x i32> %b) #0 {
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%vec = load <3 x i32>, <3 x i32> addrspace(1)* %vaddr
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%add = add <3 x i32> %vec, %b
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store <3 x i32> %add, <3 x i32> addrspace(1)* %out
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ret void
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}
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; CHECK: 'add_v4i32'
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; CHECK: estimated cost of 4 for {{.*}} add <4 x i32>
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define amdgpu_kernel void @add_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %vaddr, <4 x i32> %b) #0 {
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%vec = load <4 x i32>, <4 x i32> addrspace(1)* %vaddr
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%add = add <4 x i32> %vec, %b
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store <4 x i32> %add, <4 x i32> addrspace(1)* %out
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ret void
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}
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; CHECK: 'add_i64'
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; CHECK: estimated cost of 2 for {{.*}} add i64
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define amdgpu_kernel void @add_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
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%vec = load i64, i64 addrspace(1)* %vaddr
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%add = add i64 %vec, %b
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store i64 %add, i64 addrspace(1)* %out
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ret void
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}
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; CHECK: 'add_v2i64'
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; CHECK: estimated cost of 4 for {{.*}} add <2 x i64>
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define amdgpu_kernel void @add_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> addrspace(1)* %vaddr, <2 x i64> %b) #0 {
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%vec = load <2 x i64>, <2 x i64> addrspace(1)* %vaddr
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%add = add <2 x i64> %vec, %b
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store <2 x i64> %add, <2 x i64> addrspace(1)* %out
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ret void
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}
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; CHECK: 'add_v3i64'
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; CHECK: estimated cost of 6 for {{.*}} add <3 x i64>
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define amdgpu_kernel void @add_v3i64(<3 x i64> addrspace(1)* %out, <3 x i64> addrspace(1)* %vaddr, <3 x i64> %b) #0 {
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%vec = load <3 x i64>, <3 x i64> addrspace(1)* %vaddr
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%add = add <3 x i64> %vec, %b
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store <3 x i64> %add, <3 x i64> addrspace(1)* %out
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ret void
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}
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; CHECK: 'add_v4i64'
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; CHECK: estimated cost of 8 for {{.*}} add <4 x i64>
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define amdgpu_kernel void @add_v4i64(<4 x i64> addrspace(1)* %out, <4 x i64> addrspace(1)* %vaddr, <4 x i64> %b) #0 {
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%vec = load <4 x i64>, <4 x i64> addrspace(1)* %vaddr
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%add = add <4 x i64> %vec, %b
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store <4 x i64> %add, <4 x i64> addrspace(1)* %out
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ret void
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}
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; CHECK: 'add_v16i64'
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; CHECK: estimated cost of 32 for {{.*}} add <16 x i64>
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define amdgpu_kernel void @add_v16i64(<16 x i64> addrspace(1)* %out, <16 x i64> addrspace(1)* %vaddr, <16 x i64> %b) #0 {
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%vec = load <16 x i64>, <16 x i64> addrspace(1)* %vaddr
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%add = add <16 x i64> %vec, %b
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store <16 x i64> %add, <16 x i64> addrspace(1)* %out
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ret void
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}
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; CHECK: 'add_i16'
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; CHECK: estimated cost of 1 for {{.*}} add i16
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define amdgpu_kernel void @add_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %vaddr, i16 %b) #0 {
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%vec = load i16, i16 addrspace(1)* %vaddr
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%add = add i16 %vec, %b
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store i16 %add, i16 addrspace(1)* %out
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ret void
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}
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; CHECK: 'add_v2i16'
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; CHECK: estimated cost of 2 for {{.*}} add <2 x i16>
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define amdgpu_kernel void @add_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %vaddr, <2 x i16> %b) #0 {
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%vec = load <2 x i16>, <2 x i16> addrspace(1)* %vaddr
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%add = add <2 x i16> %vec, %b
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store <2 x i16> %add, <2 x i16> addrspace(1)* %out
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ret void
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}
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; CHECK: 'sub_i32'
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; CHECK: estimated cost of 1 for {{.*}} sub i32
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define amdgpu_kernel void @sub_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
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%vec = load i32, i32 addrspace(1)* %vaddr
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%sub = sub i32 %vec, %b
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store i32 %sub, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: 'sub_i64'
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; CHECK: estimated cost of 2 for {{.*}} sub i64
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define amdgpu_kernel void @sub_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
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%vec = load i64, i64 addrspace(1)* %vaddr
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%sub = sub i64 %vec, %b
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store i64 %sub, i64 addrspace(1)* %out
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ret void
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}
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; CHECK: 'sub_i16'
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; CHECK: estimated cost of 1 for {{.*}} sub i16
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define amdgpu_kernel void @sub_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %vaddr, i16 %b) #0 {
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%vec = load i16, i16 addrspace(1)* %vaddr
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%sub = sub i16 %vec, %b
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store i16 %sub, i16 addrspace(1)* %out
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ret void
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}
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; CHECK: 'sub_v2i16'
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; CHECK: estimated cost of 2 for {{.*}} sub <2 x i16>
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define amdgpu_kernel void @sub_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %vaddr, <2 x i16> %b) #0 {
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%vec = load <2 x i16>, <2 x i16> addrspace(1)* %vaddr
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%sub = sub <2 x i16> %vec, %b
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store <2 x i16> %sub, <2 x i16> addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind }
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