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7822bdb4d2
Disabled alongside NVVMIntrRangePass in https://reviews.llvm.org/D96166, but turns out NVVMIntrRangePass was the issue. Reviewed By: tra Differential Revision: https://reviews.llvm.org/D96291
22 lines
810 B
LLVM
22 lines
810 B
LLVM
; Libdevice in recent CUDA versions relies on __CUDA_ARCH reflecting GPU type.
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; Verify that __nvvm_reflect() is replaced with an appropriate value.
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;
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; RUN: opt %s -S -nvvm-reflect -O2 -mtriple=nvptx64 \
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; RUN: | FileCheck %s --check-prefixes=COMMON,SM20
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; RUN: opt %s -S -nvvm-reflect -O2 -mtriple=nvptx64 -mcpu=sm_35 \
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; RUN: | FileCheck %s --check-prefixes=COMMON,SM35
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@"$str" = private addrspace(1) constant [12 x i8] c"__CUDA_ARCH\00"
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declare i32 @__nvvm_reflect(i8*)
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; COMMON-LABEL: @foo
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define i32 @foo(float %a, float %b) {
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; COMMON-NOT: call i32 @__nvvm_reflect
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%reflect = call i32 @__nvvm_reflect(i8* addrspacecast (i8 addrspace(1)* getelementptr inbounds ([12 x i8], [12 x i8] addrspace(1)* @"$str", i32 0, i32 0) to i8*))
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; SM20: ret i32 200
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; SM35: ret i32 350
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ret i32 %reflect
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}
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