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e26f67279e
Add support for resolving MIPS64r2 and MIPS64r6 relocations in MCJIT. Patch by Vladimir Radosavljevic. Differential Revision: http://reviews.llvm.org/D9667 llvm-svn: 238424
18 lines
675 B
LLVM
18 lines
675 B
LLVM
; RUN: %lli -jit-kind=orc-mcjit -O0 -relocation-model=pic -code-model=small %s
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; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
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@.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
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@ptr = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), align 4
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@.str1 = private unnamed_addr constant [6 x i8] c"data2\00", align 1
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@ptr2 = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str1, i32 0, i32 0), align 4
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define i32 @main(i32 %argc, i8** nocapture %argv) nounwind readonly {
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entry:
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%0 = load i8*, i8** @ptr, align 4
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%1 = load i8*, i8** @ptr2, align 4
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%cmp = icmp eq i8* %0, %1
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%. = zext i1 %cmp to i32
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ret i32 %.
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}
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