Craig Topper 8831473b4f [X86] Add support for using 512-bit PSUBUS to combineSelect. ... The code already support 128 and 256 and even knows to split 256 for AVX1. So we really just needed to stop looking for specific VTs and subtarget features and just look for legal VTs with i8/i16 elements. While there, add some curly braces around outer if statement bodies that contain only another if. It makes all the closing curly braces look more regular. llvm-svn: 340128		2018-08-18 18:51:03 +00:00
..
Analysis	[AST] Clarify printing of unknown size locations [NFC]	2018-08-17 23:17:31 +00:00
Assembler
Bindings
Bitcode	DebugInfo: Add metadata support for disabling DWARF pub sections	2018-08-16 21:29:55 +00:00
BugPoint
CodeGen	[X86] Add support for using 512-bit PSUBUS to combineSelect.	2018-08-18 18:51:03 +00:00
DebugInfo	[DebugInfo] In FastISel, convert llvm.dbg.label to DBG_LABEL MI.	2018-08-18 14:55:34 +00:00
Demangle	[MS Demangler] Resolve backreferences eagerly, not lazily.	2018-08-18 18:49:48 +00:00
Examples
ExecutionEngine
Feature
FileCheck
Instrumentation	[InstrProf] Use atomic profile counter updates for TSan	2018-08-16 22:24:47 +00:00
Integer
JitListener
Linker
LTO
MC	[ARM/AArch64] Support FP16 +fp16fml instructions	2018-08-17 11:29:49 +00:00
Object
ObjectYAML
Other
SafepointIRVerifier
SymbolRewriter
TableGen
ThinLTO/X86	[ThinLTO] Add option for printing import failure reasons	2018-08-17 16:53:47 +00:00
tools	[llvm-objcopy] Implement -G/--keep-global-symbol(s).	2018-08-17 22:34:48 +00:00
Transforms	ValueTracking: Add tests for isKnownNeverNaN	2018-08-17 21:39:52 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg.py
lit.site.cfg.py.in
TestRunner.sh