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cd2724a625
When you define an instruction alias as a subclass of InstAlias, you specify all the MC operands for the instruction it expands to, except for operands that are tied to a previous one, which you leave out in the expectation that the Tablegen output code will fill them in automatically. But the code in Tablegen's AsmWriter backend that skips over a tied operand was doing it using 'if' instead of 'while', because it wasn't expecting to find two tied operands in sequence. So if an instruction updates a pair of registers in place, so that its MC representation has two input operands tied to the output ones (for example, Arm's UMLAL instruction), then any alias which wants to expand to a special case of that instruction is likely to fail to match, because the indices of subsequent operands will be off by one in the generated printAliasInstr function. This patch re-indents some existing code, so it's clearest when viewed as a diff with whitespace changes ignored. Reviewers: fhahn, rengolin, sdesmalen, atanasyan, asb, jholewinski, t.p.northover, kparzysz, craig.topper, stoklund Reviewed By: rengolin Subscribers: javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D53816 llvm-svn: 349141 |
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| .. | ||
| AsmMatcherEmitter.cpp | ||
| AsmWriterEmitter.cpp | ||
| AsmWriterInst.cpp | ||
| AsmWriterInst.h | ||
| Attributes.cpp | ||
| CallingConvEmitter.cpp | ||
| CMakeLists.txt | ||
| CodeEmitterGen.cpp | ||
| CodeGenDAGPatterns.cpp | ||
| CodeGenDAGPatterns.h | ||
| CodeGenHwModes.cpp | ||
| CodeGenHwModes.h | ||
| CodeGenInstruction.cpp | ||
| CodeGenInstruction.h | ||
| CodeGenIntrinsics.h | ||
| CodeGenMapTable.cpp | ||
| CodeGenRegisters.cpp | ||
| CodeGenRegisters.h | ||
| CodeGenSchedule.cpp | ||
| CodeGenSchedule.h | ||
| CodeGenTarget.cpp | ||
| CodeGenTarget.h | ||
| CTagsEmitter.cpp | ||
| DAGISelEmitter.cpp | ||
| DAGISelMatcher.cpp | ||
| DAGISelMatcher.h | ||
| DAGISelMatcherEmitter.cpp | ||
| DAGISelMatcherGen.cpp | ||
| DAGISelMatcherOpt.cpp | ||
| DFAPacketizerEmitter.cpp | ||
| DisassemblerEmitter.cpp | ||
| ExegesisEmitter.cpp | ||
| FastISelEmitter.cpp | ||
| FixedLenDecoderEmitter.cpp | ||
| GlobalISelEmitter.cpp | ||
| InfoByHwMode.cpp | ||
| InfoByHwMode.h | ||
| InstrDocsEmitter.cpp | ||
| InstrInfoEmitter.cpp | ||
| IntrinsicEmitter.cpp | ||
| LLVMBuild.txt | ||
| OptParserEmitter.cpp | ||
| PredicateExpander.cpp | ||
| PredicateExpander.h | ||
| PseudoLoweringEmitter.cpp | ||
| RegisterBankEmitter.cpp | ||
| RegisterInfoEmitter.cpp | ||
| RISCVCompressInstEmitter.cpp | ||
| SDNodeProperties.cpp | ||
| SDNodeProperties.h | ||
| SearchableTableEmitter.cpp | ||
| SequenceToOffsetTable.h | ||
| SubtargetEmitter.cpp | ||
| SubtargetFeatureInfo.cpp | ||
| SubtargetFeatureInfo.h | ||
| TableGen.cpp | ||
| TableGenBackends.h | ||
| tdtags | ||
| Types.cpp | ||
| Types.h | ||
| WebAssemblyDisassemblerEmitter.cpp | ||
| WebAssemblyDisassemblerEmitter.h | ||
| X86DisassemblerShared.h | ||
| X86DisassemblerTables.cpp | ||
| X86DisassemblerTables.h | ||
| X86EVEX2VEXTablesEmitter.cpp | ||
| X86FoldTablesEmitter.cpp | ||
| X86ModRMFilters.cpp | ||
| X86ModRMFilters.h | ||
| X86RecognizableInstr.cpp | ||
| X86RecognizableInstr.h | ||