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d0c3452c1c
Note that one-use and shouldChangeType() are checked ahead of the switch. Without the narrowing folds, we can produce inferior vector code as shown in PR35299: https://bugs.llvm.org/show_bug.cgi?id=35299 llvm-svn: 318323
32 lines
1.1 KiB
LLVM
32 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S %s -instcombine | FileCheck %s
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@glob = external global i16
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define void @patatino(i8 %beth) {
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; CHECK-LABEL: @patatino(
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; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[BETH:%.*]] to i32
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; CHECK-NEXT: br i1 false, label [[IF_THEN9:%.*]], label [[IF_THEN9]]
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; CHECK: if.then9:
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; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i32 [[CONV]], [[CONV]]
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; CHECK-NEXT: [[TINKY:%.*]] = load i16, i16* @glob, align 2
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[MUL]] to i16
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; CHECK-NEXT: [[CONV14:%.*]] = and i16 [[TINKY]], [[TMP1]]
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; CHECK-NEXT: store i16 [[CONV14]], i16* @glob, align 2
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; CHECK-NEXT: ret void
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;
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%conv = zext i8 %beth to i32
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%mul = mul nuw nsw i32 %conv, %conv
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%conv3 = and i32 %mul, 255
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%tobool8 = icmp ne i32 %mul, %conv3
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br i1 %tobool8, label %if.then9, label %if.then9
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if.then9:
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%tinky = load i16, i16* @glob
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%conv13 = sext i16 %tinky to i32
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%and = and i32 %mul, %conv13
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%conv14 = trunc i32 %and to i16
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store i16 %conv14, i16* @glob
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ret void
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}
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