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8c57e70f93
The x86-64 ABI states that objects passed on the stack have 8 byte alignment. Implement that. llvm-svn: 41768
184 lines
6.1 KiB
C++
184 lines
6.1 KiB
C++
//=====---- X86Subtarget.h - Define Subtarget for the X86 -----*- C++ -*--====//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Nate Begeman and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the X86 specific subclass of TargetSubtarget.
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//
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//===----------------------------------------------------------------------===//
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#ifndef X86SUBTARGET_H
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#define X86SUBTARGET_H
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#include "llvm/Target/TargetSubtarget.h"
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#include <string>
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namespace llvm {
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class Module;
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class GlobalValue;
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class TargetMachine;
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namespace PICStyle {
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enum Style {
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Stub, GOT, RIPRel, WinPIC, None
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};
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}
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class X86Subtarget : public TargetSubtarget {
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public:
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enum AsmWriterFlavorTy {
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// Note: This numbering has to match the GCC assembler dialects for inline
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// asm alternatives to work right.
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ATT = 0, Intel = 1, Unset
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};
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protected:
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enum X86SSEEnum {
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NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3
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};
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enum X863DNowEnum {
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NoThreeDNow, ThreeDNow, ThreeDNowA
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};
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/// AsmFlavor - Which x86 asm dialect to use.
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///
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AsmWriterFlavorTy AsmFlavor;
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/// PICStyle - Which PIC style to use
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///
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PICStyle::Style PICStyle;
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/// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, or none supported.
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///
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X86SSEEnum X86SSELevel;
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/// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.
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///
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X863DNowEnum X863DNowLevel;
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/// HasX86_64 - True if the processor supports X86-64 instructions.
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///
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bool HasX86_64;
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/// stackAlignment - The minimum alignment known to hold of the stack frame on
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/// entry to the function and which must be maintained by every function.
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unsigned stackAlignment;
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/// Min. memset / memcpy size that is turned into rep/movs, rep/stos ops.
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///
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unsigned MinRepStrSizeThreshold;
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private:
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/// Is64Bit - True if the processor supports 64-bit instructions and module
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/// pointer size is 64 bit.
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bool Is64Bit;
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/// HasLow4GUserAddress - True if the low 4G user-space address is available.
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///
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bool HasLow4GUserAddress;
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public:
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enum {
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isELF, isCygwin, isDarwin, isWindows, isMingw
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} TargetType;
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/// This constructor initializes the data members to match that
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/// of the specified module.
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///
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X86Subtarget(const Module &M, const std::string &FS, bool is64Bit);
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/// getStackAlignment - Returns the minimum alignment known to hold of the
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/// stack frame on entry to the function and which must be maintained by every
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/// function for this subtarget.
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unsigned getStackAlignment() const { return stackAlignment; }
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/// getMinRepStrSizeThreshold - Returns the minimum memset / memcpy size
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/// required to turn the operation into a X86 rep/movs or rep/stos
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/// instruction. This is only used if the src / dst alignment is not DWORD
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/// aligned.
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unsigned getMinRepStrSizeThreshold() const { return MinRepStrSizeThreshold; }
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/// ParseSubtargetFeatures - Parses features string setting specified
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/// subtarget options. Definition of function is auto generated by tblgen.
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void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
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/// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID
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/// instruction.
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void AutoDetectSubtargetFeatures();
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bool is64Bit() const { return Is64Bit; }
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/// hasLow4GUserSpaceAddress - True if lower 4G user-space address is
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/// available.
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bool hasLow4GUserSpaceAddress() const { return HasLow4GUserAddress; }
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PICStyle::Style getPICStyle() const { return PICStyle; }
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void setPICStyle(PICStyle::Style Style) { PICStyle = Style; }
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bool hasMMX() const { return X86SSELevel >= MMX; }
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bool hasSSE1() const { return X86SSELevel >= SSE1; }
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bool hasSSE2() const { return X86SSELevel >= SSE2; }
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bool hasSSE3() const { return X86SSELevel >= SSE3; }
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bool hasSSSE3() const { return X86SSELevel >= SSSE3; }
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bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
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bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
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unsigned getAsmFlavor() const {
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return AsmFlavor != Unset ? unsigned(AsmFlavor) : 0;
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}
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bool isFlavorAtt() const { return AsmFlavor == ATT; }
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bool isFlavorIntel() const { return AsmFlavor == Intel; }
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bool isTargetDarwin() const { return TargetType == isDarwin; }
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bool isTargetELF() const { return TargetType == isELF; }
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bool isTargetWindows() const { return TargetType == isWindows; }
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bool isTargetMingw() const { return TargetType == isMingw; }
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bool isTargetCygMing() const { return (TargetType == isMingw ||
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TargetType == isCygwin); }
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bool isTargetCygwin() const { return TargetType == isCygwin; }
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std::string getDataLayout() const {
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const char *p;
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if (is64Bit())
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p = "e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128";
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else {
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if (isTargetDarwin())
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p = "e-p:32:32-f64:32:64-i64:32:64-f80:128:128";
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else
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p = "e-p:32:32-f64:32:64-i64:32:64-f80:32:32";
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}
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return std::string(p);
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}
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bool isPICStyleSet() const { return PICStyle != PICStyle::None; }
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bool isPICStyleGOT() const { return PICStyle == PICStyle::GOT; }
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bool isPICStyleStub() const { return PICStyle == PICStyle::Stub; }
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bool isPICStyleRIPRel() const { return PICStyle == PICStyle::RIPRel; }
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bool isPICStyleWinPIC() const { return PICStyle == PICStyle:: WinPIC; }
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/// True if accessing the GV requires an extra load. For Windows, dllimported
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/// symbols are indirect, loading the value at address GV rather then the
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/// value of GV itself. This means that the GlobalAddress must be in the base
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/// or index register of the address, not the GV offset field.
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bool GVRequiresExtraLoad(const GlobalValue* GV, const TargetMachine& TM,
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bool isDirectCall) const;
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};
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namespace X86 {
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/// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in
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/// the specified arguments. If we can't run cpuid on the host, return true.
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bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX,
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unsigned *rECX, unsigned *rEDX);
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}
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} // End llvm namespace
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#endif
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