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129 lines
3.3 KiB
LLVM
129 lines
3.3 KiB
LLVM
; RUN: llc < %s -mtriple=aarch64-eabi -mattr=+v8.2a,+fullfp16 | FileCheck %s
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declare half @llvm.aarch64.sisd.fabd.f16(half, half)
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declare half @llvm.aarch64.neon.fmax.f16(half, half)
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declare half @llvm.aarch64.neon.fmin.f16(half, half)
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declare half @llvm.aarch64.neon.frsqrts.f16(half, half)
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declare half @llvm.aarch64.neon.frecps.f16(half, half)
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declare half @llvm.aarch64.neon.fmulx.f16(half, half)
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declare half @llvm.fabs.f16(half)
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define dso_local half @t_vabdh_f16(half %a, half %b) {
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; CHECK-LABEL: t_vabdh_f16:
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; CHECK: fabd h0, h0, h1
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; CHECK-NEXT: ret
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entry:
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%vabdh_f16 = tail call half @llvm.aarch64.sisd.fabd.f16(half %a, half %b)
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ret half %vabdh_f16
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}
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define dso_local half @t_vabdh_f16_from_fsub_fabs(half %a, half %b) {
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; CHECK-LABEL: t_vabdh_f16_from_fsub_fabs:
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; CHECK: fabd h0, h0, h1
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; CHECK-NEXT: ret
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entry:
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%sub = fsub half %a, %b
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%abs = tail call half @llvm.fabs.f16(half %sub)
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ret half %abs
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}
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define dso_local i16 @t_vceqh_f16(half %a, half %b) {
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; CHECK-LABEL: t_vceqh_f16:
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; CHECK: fcmp h0, h1
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; CHECK-NEXT: csetm w0, eq
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; CHECK-NEXT: ret
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entry:
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%0 = fcmp oeq half %a, %b
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%vcmpd = sext i1 %0 to i16
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ret i16 %vcmpd
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}
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define dso_local i16 @t_vcgeh_f16(half %a, half %b) {
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; CHECK-LABEL: t_vcgeh_f16:
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; CHECK: fcmp h0, h1
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; CHECK-NEXT: csetm w0, ge
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; CHECK-NEXT: ret
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entry:
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%0 = fcmp oge half %a, %b
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%vcmpd = sext i1 %0 to i16
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ret i16 %vcmpd
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}
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define dso_local i16 @t_vcgth_f16(half %a, half %b) {
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; CHECK-LABEL: t_vcgth_f16:
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; CHECK: fcmp h0, h1
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; CHECK-NEXT: csetm w0, gt
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; CHECK-NEXT: ret
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entry:
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%0 = fcmp ogt half %a, %b
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%vcmpd = sext i1 %0 to i16
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ret i16 %vcmpd
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}
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define dso_local i16 @t_vcleh_f16(half %a, half %b) {
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; CHECK-LABEL: t_vcleh_f16:
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; CHECK: fcmp h0, h1
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; CHECK-NEXT: csetm w0, ls
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; CHECK-NEXT: ret
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entry:
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%0 = fcmp ole half %a, %b
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%vcmpd = sext i1 %0 to i16
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ret i16 %vcmpd
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}
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define dso_local i16 @t_vclth_f16(half %a, half %b) {
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; CHECK-LABEL: t_vclth_f16:
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; CHECK: fcmp h0, h1
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; CHECK-NEXT: csetm w0, mi
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; CHECK-NEXT: ret
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entry:
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%0 = fcmp olt half %a, %b
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%vcmpd = sext i1 %0 to i16
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ret i16 %vcmpd
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}
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define dso_local half @t_vmaxh_f16(half %a, half %b) {
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; CHECK-LABEL: t_vmaxh_f16:
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; CHECK: fmax h0, h0, h1
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; CHECK-NEXT: ret
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entry:
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%vmax = tail call half @llvm.aarch64.neon.fmax.f16(half %a, half %b)
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ret half %vmax
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}
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define dso_local half @t_vminh_f16(half %a, half %b) {
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; CHECK-LABEL: t_vminh_f16:
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; CHECK: fmin h0, h0, h1
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; CHECK-NEXT: ret
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entry:
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%vmin = tail call half @llvm.aarch64.neon.fmin.f16(half %a, half %b)
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ret half %vmin
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}
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define dso_local half @t_vmulxh_f16(half %a, half %b) {
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; CHECK-LABEL: t_vmulxh_f16:
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; CHECK: fmulx h0, h0, h1
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; CHECK-NEXT: ret
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entry:
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%vmulxh_f16 = tail call half @llvm.aarch64.neon.fmulx.f16(half %a, half %b)
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ret half %vmulxh_f16
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}
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define dso_local half @t_vrecpsh_f16(half %a, half %b) {
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; CHECK-LABEL: t_vrecpsh_f16:
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; CHECK: frecps h0, h0, h1
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; CHECK-NEXT: ret
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entry:
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%vrecps = tail call half @llvm.aarch64.neon.frecps.f16(half %a, half %b)
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ret half %vrecps
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}
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define dso_local half @t_vrsqrtsh_f16(half %a, half %b) {
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; CHECK-LABEL: t_vrsqrtsh_f16:
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; CHECK: frsqrts h0, h0, h1
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; CHECK-NEXT: ret
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entry:
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%vrsqrtsh_f16 = tail call half @llvm.aarch64.neon.frsqrts.f16(half %a, half %b)
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ret half %vrsqrtsh_f16
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}
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