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ef448d0349
This patch contains a pass that transforms CBZ/CBNZ/TBZ/TBNZ instructions into a conditional branch (Bcc), when the NZCV flags can be set for "free". This is preferred on targets that have more flexibility when scheduling Bcc instructions as compared to CBZ/CBNZ/TBZ/TBNZ (assuming all other variables are equal). This can reduce register pressure and is also the default behavior for GCC. A few examples: add w8, w0, w1 -> cmn w0, w1 ; CMN is an alias of ADDS. cbz w8, .LBB_2 -> b.eq .LBB0_2 ; single def/use of w8 removed. add w8, w0, w1 -> adds w8, w0, w1 ; w8 has multiple uses. cbz w8, .LBB1_2 -> b.eq .LBB1_2 sub w8, w0, w1 -> subs w8, w0, w1 ; w8 has multiple uses. tbz w8, #31, .LBB6_2 -> b.ge .LBB6_2 In looking at all current sub-target machine descriptions, this transformation appears to be either positive or neutral. Differential Revision: https://reviews.llvm.org/D34220. llvm-svn: 306144
31 lines
1.2 KiB
LLVM
31 lines
1.2 KiB
LLVM
; RUN: llc < %s -mtriple=arm64-apple-ios -relocation-model=pic -disable-fp-elim | FileCheck %s
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@__stack_chk_guard = external global i64*
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; PR20558
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; CHECK: adrp [[R0:x[0-9]+]], ___stack_chk_guard@GOTPAGE
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; CHECK: ldr [[R1:x[0-9]+]], {{\[}}[[R0]], ___stack_chk_guard@GOTPAGEOFF{{\]}}
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; Load the stack guard for the second time, just in case the previous value gets spilled.
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; CHECK: adrp [[GUARD_PAGE:x[0-9]+]], ___stack_chk_guard@GOTPAGE
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; CHECK: ldr [[R2:x[0-9]+]], {{\[}}[[R1]]{{\]}}
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; CHECK: stur [[R2]], {{\[}}x29, [[SLOT0:[0-9#\-]+]]{{\]}}
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; CHECK: ldur [[R3:x[0-9]+]], {{\[}}x29, [[SLOT0]]{{\]}}
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; CHECK: ldr [[GUARD_ADDR:x[0-9]+]], {{\[}}[[GUARD_PAGE]], ___stack_chk_guard@GOTPAGEOFF{{\]}}
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; CHECK: ldr [[GUARD:x[0-9]+]], {{\[}}[[GUARD_ADDR]]{{\]}}
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; CHECK: cmp [[GUARD]], [[R3]]
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; CHECK: b.ne LBB
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define i32 @test_stack_guard_remat2() {
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entry:
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%StackGuardSlot = alloca i8*
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%StackGuard = load i8*, i8** bitcast (i64** @__stack_chk_guard to i8**)
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call void @llvm.stackprotector(i8* %StackGuard, i8** %StackGuardSlot)
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%container = alloca [32 x i8], align 1
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call void @llvm.stackprotectorcheck(i8** bitcast (i64** @__stack_chk_guard to i8**))
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ret i32 -1
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}
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declare void @llvm.stackprotector(i8*, i8**)
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declare void @llvm.stackprotectorcheck(i8**)
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