Matt Arsenault 37fceca98a AMDGPU: Change private_element_size to 4 ... llvm-svn: 269145		2016-05-11 00:28:54 +00:00
..
AArch64	AArch64: allow vN to represent 64-bit registers in inline asm.	2016-05-10 22:26:45 +00:00
AMDGPU	AMDGPU: Change private_element_size to 4	2016-05-11 00:28:54 +00:00
ARM	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
BPF
Generic	llc: Rework -run-pass option	2016-05-10 01:32:44 +00:00
Hexagon	[ScheduleDAG] Make sure to process all def operands before any use operands	2016-05-10 16:50:30 +00:00
Inputs
Lanai	[lanai] Add subword scheduling itineraries.	2016-04-20 18:28:55 +00:00
Mips	[mips][micromips] Make getPointerRegClass() result depend on the instruction.	2016-05-09 13:38:25 +00:00
MIR	ARM: fix handling of SUB immediates in peephole opt.	2016-05-02 18:30:08 +00:00
MSP430
NVPTX	[NVPTX] Fix sign/zero-extending ldg/ldu instruction selection	2016-05-02 18:12:02 +00:00
PowerPC	Make "@name =" mandatory for globals in .ll files.	2016-05-10 18:22:45 +00:00
SPARC	[Sparc][LEON] Itineraries unit test.	2016-05-10 09:09:20 +00:00
SystemZ	[PR27599] [SystemZ] [SelectionDAG] Fix extension of atomic cmpxchg result.	2016-05-10 16:49:04 +00:00
Thumb	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
Thumb2	ARM: stop emitting blx instructions for most calls on MachO.	2016-05-10 19:17:47 +00:00
WebAssembly	[WebAssembly] Preliminary fast-isel support.	2016-05-10 17:39:48 +00:00
WinEH
X86	auto-generate checks	2016-05-10 22:33:26 +00:00
XCore