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a84e232f6d
Summary: If you pass two 1024 bit vectors in IR with AVX2 on Windows 64. Both vectors will be split in four 256 bit pieces. The four pieces of the first argument will be passed indirectly using 4 gprs. The second argument will get passed via pointers in memory. The PartOffsets stored for the second argument are all in terms of its original 1024 bit size. So the PartOffsets for each piece are 32 bytes apart. So if we consider it for copy elision we'll only load an 8 byte pointer, but we'll move the address 32 bytes. The stack object size we create for the first part is probably wrong too. This issue was encountered by ISPC. I'm working on getting a reduce test case, but wanted to go ahead and get feedback on the fix. Reviewers: rnk Reviewed By: rnk Subscribers: dbabokin, llvm-commits, hiraditya Tags: #llvm Differential Revision: https://reviews.llvm.org/D60801 llvm-svn: 358817
50 lines
1.9 KiB
LLVM
50 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-windows-msvc -mattr=avx2 | FileCheck %s
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; Make sure we don't try to copy elide these arguments since they will be
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; passed indirectly.
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define void @baz(<16 x double> %arg, <16 x double> %arg1) #0 {
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; CHECK-LABEL: baz:
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; CHECK: # %bb.0: # %bb
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; CHECK-NEXT: pushq %rbp
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; CHECK-NEXT: subq $368, %rsp # imm = 0x170
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; CHECK-NEXT: leaq {{[0-9]+}}(%rsp), %rbp
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; CHECK-NEXT: vmovaps %xmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: vmovaps %xmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; CHECK-NEXT: andq $-128, %rsp
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; CHECK-NEXT: movq 288(%rbp), %rax
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; CHECK-NEXT: vmovaps (%rax), %ymm0
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; CHECK-NEXT: movq 296(%rbp), %rax
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; CHECK-NEXT: vmovaps (%rax), %ymm1
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; CHECK-NEXT: movq 304(%rbp), %rax
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; CHECK-NEXT: vmovaps (%rax), %ymm2
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; CHECK-NEXT: movq 312(%rbp), %rax
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; CHECK-NEXT: vmovaps (%rax), %ymm3
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; CHECK-NEXT: vmovaps (%rcx), %ymm4
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; CHECK-NEXT: vmovaps (%rdx), %ymm5
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; CHECK-NEXT: vmovaps (%r8), %ymm6
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; CHECK-NEXT: vmovaps (%r9), %ymm7
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; CHECK-NEXT: vmovaps %ymm7, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: vmovaps %ymm6, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: vmovaps %ymm5, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: vmovaps %ymm4, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: vmovaps %ymm3, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: vmovaps %ymm2, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: vmovaps %ymm1, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: vmovaps %ymm0, (%rsp)
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; CHECK-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm6 # 16-byte Reload
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; CHECK-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm7 # 16-byte Reload
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; CHECK-NEXT: leaq 240(%rbp), %rsp
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; CHECK-NEXT: popq %rbp
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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bb:
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%tmp = alloca <16 x double>
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%tmp2 = alloca <16 x double>
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store <16 x double> %arg, <16 x double>* %tmp
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store <16 x double> %arg1, <16 x double>* %tmp2
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ret void
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}
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attributes #0 = { nounwind }
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