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llvm-mirror/include/llvm/Target
Amara Emerson 5e3045ed0c [GlobalISel] Add a constant folding combine.
Use it AArch64 post-legal combiner. These don't always get folded because when
the instructions are created the constants are obscured by artifacts.

Differential Revision: https://reviews.llvm.org/D106776
2021-07-26 14:53:33 -07:00
..
GlobalISel [GlobalISel] Add a constant folding combine. 2021-07-26 14:53:33 -07:00
CGPassBuilderOption.h [llvm, clang] Remove stdlib includes from .h files without std:: 2021-04-27 12:41:39 -04:00
CodeGenCWrappers.h
GenericOpcodes.td [GISel] Support llvm.memcpy.inline 2021-06-30 12:39:05 -07:00
Target.td [llvm][clang][fpenv] Create new intrinsic llvm.arith.fence to control FP optimization at expression level 2021-06-28 12:26:52 -04:00
TargetCallingConv.td IR+AArch64: add a "swiftasync" argument attribute. 2021-05-14 11:43:58 +01:00
TargetInstrPredicate.td [TableGen] Clean up Target .td include files 2020-11-17 09:45:14 -05:00
TargetIntrinsicInfo.h TargetIntrinsicInfo.h - remove unnecessary Compiler.h include. NFC. 2020-05-19 09:28:13 +01:00
TargetItinerary.td [TableGen] Clean up Target .td include files 2020-11-17 09:45:14 -05:00
TargetLoweringObjectFile.h Basic block sections should enable function sections implicitly. 2021-02-16 16:27:16 -08:00
TargetMachine.h [NewPM] Hide pass manager debug logging behind -debug-pass-manager-verbose 2021-05-07 21:51:47 -07:00
TargetOptions.h Revert "[clang] -falign-loops=" 2021-07-23 09:58:35 -07:00
TargetPfmCounters.td [TableGen] Clean up Target .td include files 2020-11-17 09:45:14 -05:00
TargetSchedule.td [TableGen] Remove unneeded forward defs. NFC. 2021-05-14 12:36:20 +01:00
TargetSelectionDAG.td [NFC] Fix a few whitespace issues and typos. 2021-07-04 11:49:58 +01:00