Tim Northover 5ba7519ed1 GlobalISel: mark simple ops legal even on types < 32-bit. ... The 32-bit variants of these operations don't depend on the bits not being operated on, so they also naturally model operations narrower than the actual register width. llvm-svn: 279760		2016-08-25 17:37:39 +00:00
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Analysis	[UNROLL] Postpone ScalarEvolution::forgetLoop after TripCountSC is expanded	2016-08-25 16:17:18 +00:00
Assembler	DebugInfo: Add flag to CU to disable emission of inline debug info into the skeleton CU	2016-08-24 18:29:49 +00:00
Bindings
Bitcode
BugPoint
CodeGen	GlobalISel: mark simple ops legal even on types < 32-bit.	2016-08-25 17:37:39 +00:00
DebugInfo	MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it	2016-08-25 01:27:13 +00:00
Examples
ExecutionEngine
Feature
FileCheck
Instrumentation
Integer
JitListener
LibDriver
Linker
LTO
MC	ARM: don't diagnose cbz/cbnz to Thumb functions.	2016-08-24 21:21:29 +00:00
Object
ObjectYAML
Other	[PM] Introduce basic update capabilities to the new PM's CGSCC pass	2016-08-24 09:37:14 +00:00
SymbolRewriter
TableGen
ThinLTO/X86	[ThinLTO] Add caching to the new LTO API	2016-08-23 21:30:12 +00:00
tools	[ThinLTO/gold] Add caching support to gold-plugin	2016-08-24 15:11:47 +00:00
Transforms	GVN-hoist: fix hoistingFromAllPaths for loops (PR29034)	2016-08-25 11:55:47 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
TestRunner.sh