Arnold Schwaighofer 38aac11be0 ARM Scheduler Model: Add resources instructions, map resources in subtargets ... Reapply r177968: After commit 178074 we can now have undefined scheduler variants. Move the CortexA9 resources into the CortexA9 SchedModel namespace. Define resource mappings under the CortexA9 SchedModel. Define resources and mappings for the SwiftModel. Incooperate Andrew's feedback. llvm-svn: 178460		2013-04-01 13:07:05 +00:00
..
Analysis	Build fixes for STLPort + GCC	2013-03-29 18:48:45 +00:00
Archive
AsmParser
Bitcode	Whitespace cleanup	2013-04-01 02:28:07 +00:00
CodeGen	DAGCombine: visitXOR can replace a node without returning it, bail out in that case.	2013-03-30 21:28:18 +00:00
DebugInfo	Fix missing std::. Not sure how this compiles for anyone else.	2013-03-21 00:57:21 +00:00
ExecutionEngine
IR	Revert "Adding DIImportedModules to DIScopes."	2013-03-28 02:44:59 +00:00
IRReader	Split out the IRReader header and the utility functions it provides into	2013-03-26 02:25:37 +00:00
Linker	Specutively revert r178130.	2013-03-27 17:54:41 +00:00
MC	Change '@SECREL' suffix to GAS-compatible '@SECREL32'.	2013-03-30 16:21:50 +00:00
Object
Option
Support	Put private class into an anonmyous namespace.	2013-03-30 15:23:08 +00:00
TableGen	Allow TableGen DAG arguments to be just a name.	2013-03-24 19:36:51 +00:00
Target	ARM Scheduler Model: Add resources instructions, map resources in subtargets	2013-04-01 13:07:05 +00:00
Transforms	Implement XOR reassociation. It is based on following rules:	2013-03-30 02:15:01 +00:00
CMakeLists.txt	Split out the IRReader header and the utility functions it provides into	2013-03-26 02:25:37 +00:00
LLVMBuild.txt	Split out the IRReader header and the utility functions it provides into	2013-03-26 02:25:37 +00:00
Makefile	Split out the IRReader header and the utility functions it provides into	2013-03-26 02:25:37 +00:00