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Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368
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18 lines
556 B
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* Automatically generated file, do not edit! *
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.. _amdgpu_synid8_dst_buf_d16_32:
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vdst
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===========================
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Instruction output: data read from a memory buffer and converted to a 16-bit format.
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*Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
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*Operands:* :ref:`v<amdgpu_synid_v>`
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