Evan Cheng 392d2cbdcc Avoiding overly aggressive latency scheduling. If the two nodes share an ... operand and one of them has a single use that is a live out copy, favor the one that is live out. Otherwise it will be difficult to eliminate the copy if the instruction is a loop induction variable update. e.g. BB: sub r1, r3, #1 str r0, [r2, r3] mov r3, r1 cmp bne BB => BB: str r0, [r2, r3] sub r3, r3, #1 cmp bne BB This fixed the recent 256.bzip2 regression. llvm-svn: 117675		2010-10-29 18:09:28 +00:00
..
CMakeLists.txt	Removed a bunch of unnecessary target_link_libraries.	2010-09-28 22:39:14 +00:00
DAGCombiner.cpp	Teach the DAG combiner to fold a splat of a splat. Radar 8597790.	2010-10-28 17:06:14 +00:00
FastISel.cpp	Use frame index, if available for byval argument while lowering dbg_declare. Otherwise let getRegForValue() find register for this argument.	2010-09-14 20:29:31 +00:00
FunctionLoweringInfo.cpp	Reapply r112623. Included additional check for unused byval argument.	2010-08-31 22:22:42 +00:00
InstrEmitter.cpp	Revert r112461. It was failing on PPC...	2010-08-30 04:36:50 +00:00
InstrEmitter.h
LegalizeDAG.cpp	Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any	2010-10-19 23:27:08 +00:00
LegalizeFloatTypes.cpp	update a bunch of code to use the MachinePointerInfo version of getStore.	2010-09-21 18:41:36 +00:00
LegalizeIntegerTypes.cpp	propagate MachinePointerInfo through various uses of the old	2010-09-21 17:04:51 +00:00
LegalizeTypes.cpp	continue MachinePointerInfo'izing, eliminating use of one of the old	2010-09-21 16:36:31 +00:00
LegalizeTypes.h	implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1.	2010-08-26 05:51:22 +00:00
LegalizeTypesGeneric.cpp	update a bunch of code to use the MachinePointerInfo version of getStore.	2010-09-21 18:41:36 +00:00
LegalizeVectorOps.cpp
LegalizeVectorTypes.cpp	Remove Synthesizable from the Type system; as MMX vector	2010-10-20 21:32:10 +00:00
Makefile
ScheduleDAGFast.cpp	Make fast scheduler handle asm clobbers correctly.	2010-08-17 22:17:24 +00:00
ScheduleDAGList.cpp
ScheduleDAGRRList.cpp	Avoiding overly aggressive latency scheduling. If the two nodes share an	2010-10-29 18:09:28 +00:00
ScheduleDAGSDNodes.cpp	Avoiding overly aggressive latency scheduling. If the two nodes share an	2010-10-29 18:09:28 +00:00
ScheduleDAGSDNodes.h	Teach if-converter to be more careful with predicating instructions that would	2010-09-10 01:29:16 +00:00
SDNodeDbgValue.h
SDNodeOrdering.h
SelectionDAG.cpp	Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches	2010-10-26 23:11:10 +00:00
SelectionDAGBuilder.cpp	Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.	2010-10-29 17:29:13 +00:00
SelectionDAGBuilder.h	When isel is emitting instructions for an x86 target without CMOV, the CFG is	2010-09-30 19:44:31 +00:00
SelectionDAGISel.cpp	For statistics that are only used in functions declared in !NDEBUG, wrap the	2010-10-26 00:51:57 +00:00
SelectionDAGPrinter.cpp	Eliminate unnecessary empty string literals.	2010-08-04 01:39:08 +00:00
TargetLowering.cpp	Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.	2010-10-29 17:29:13 +00:00
TargetSelectionDAGInfo.cpp