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llvm-mirror/test/CodeGen/NVPTX/pow2_mask_cmp.ll
Sven van Haastregt a77c70490e [TargetLowering] Add i1 condition for bit comparison fold
For i1 types, boolean false is represented identically regardless of
the boolean content, so we can allow optimizations that otherwise
would not be correct for booleans with false represented as a negative
one.

Patch by Erik Hogeman.

Differential Revision: https://reviews.llvm.org/D90145
2020-10-27 12:22:20 +00:00

20 lines
644 B
LLVM

; RUN: llc -march=nvptx -verify-machineinstrs < %s | FileCheck %s
; Tests the following pattern:
; (X & 8) != 0 --> (X & 8) >> 3
; This produces incorrect code in general when boolean false is
; represented as a negative one. There is however a special
; case when the type has a bitsize of 1, for which the false
; value will be identical regardless of the boolean representation.
; Check that the optimization triggers in this case.
; CHECK-LABEL: @pow2_mask_cmp
; CHECK: bfe.u32 {{%r[0-9]+}}, {{%r[0-9]+}}, 3, 1
define i32 @pow2_mask_cmp(i32 %x) {
%a = and i32 %x, 8
%cmp = icmp ne i32 %a, 0
%r = zext i1 %cmp to i32
ret i32 %r
}