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llvm-mirror/test/CodeGen/MIR/X86/undefined-virtual-register.mir
Alex Lorenz 3307a878a0 MIR Serialization: Serialize the virtual register operands.
Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D11005

llvm-svn: 241959
2015-07-10 22:51:20 +00:00

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# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser reports an error when parsing a
# reference to an undefined virtual register.
--- |
define i32 @test(i32 %a) {
entry:
ret i32 %a
}
...
---
name: test
isSSA: true
tracksRegLiveness: true
registers:
- { id: 0, class: gr32 }
body:
- id: 0
name: entry
instructions:
- '%0 = COPY %edi'
# CHECK: [[@LINE+1]]:22: use of undefined virtual register '%10'
- '%eax = COPY %10'
- 'RETQ %eax'
...