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llvm-mirror/lib/Target/AArch64
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Balaram Makam 127d0e73d2 [AArch64] Add new subtarget feature to fold LSL into address mode. 
Summary:
This feature enables folding of logical shift operations of up to 3 places into addressing mode on Kryo and Falkor that have a fastpath LSL.

Reviewers: mcrosier, rengolin, t.p.northover

Subscribers: junbuml, gberry, llvm-commits, aemerson

Differential Revision: https://reviews.llvm.org/D31113

llvm-svn: 299240
2017-03-31 18:16:53 +00:00
..
AsmParser [AArch64AsmParser] rewrite of function parseSysAlias 2017-03-03 08:12:47 +00:00
Disassembler [AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2017-01-06 00:30:53 +00:00
InstPrinter AArch64InstPrinter: rewrite of printSysAlias 2017-02-27 14:45:34 +00:00
MCTargetDesc [AArch64] Fix some Include What You Use warnings; other minor fixes (NFC). 2017-02-03 21:49:13 +00:00
TargetInfo
Utils [AArch64AsmParser] rewrite of function parseSysAlias 2017-03-03 08:12:47 +00:00
AArch64.h
AArch64.td [AArch64] Add new subtarget feature to fold LSL into address mode. 2017-03-31 18:16:53 +00:00
AArch64A53Fix835769.cpp
AArch64A57FPLoadBalancing.cpp LiveRegUnits: Add accumulateBackward() function 2017-01-21 02:21:04 +00:00
AArch64AddressTypePromotion.cpp [AArch64] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2017-01-25 00:29:26 +00:00
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp [XRay] Merge instrumentation point table emission code into AsmPrinter. 2017-01-03 04:30:21 +00:00
AArch64CallingConvention.h
AArch64CallingConvention.td SwiftCC: swifterror register cannot be as the base register 2017-02-09 01:52:17 +00:00
AArch64CallLowering.cpp Rename AttributeSet to AttributeList 2017-03-21 16:57:19 +00:00
AArch64CallLowering.h [GlobalISel] Use the correct calling conv for calls 2017-03-20 14:40:18 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp AArch64CollectLOH: Rewrite as block-local analysis. 2017-01-06 19:22:01 +00:00
AArch64ConditionalCompares.cpp [CodeGen] Rename MachineInstrBuilder::addOperand. NFC 2017-01-13 09:58:52 +00:00
AArch64ConditionOptimizer.cpp [CodeGen] Rename MachineInstrBuilder::addOperand. NFC 2017-01-13 09:58:52 +00:00
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp [AArch64] Mark mrs of TPIDR_EL0 (thread pointer) as not having side effects. 2017-03-27 15:52:38 +00:00
AArch64FastISel.cpp [AArch64] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2017-01-25 00:29:26 +00:00
AArch64FrameLowering.cpp Rename AttributeSet to AttributeList 2017-03-21 16:57:19 +00:00
AArch64FrameLowering.h
AArch64GenRegisterBankInfo.def GlobalISel: fall back gracefully when we can't map an operand's size. 2017-02-06 21:57:06 +00:00
AArch64InstrAtomics.td
AArch64InstrFormats.td [AArch64] [Assembler] option to disable negative immediate conversions 2017-03-28 10:02:56 +00:00
AArch64InstrInfo.cpp [Outliner] Revert r298734. 2017-03-24 23:00:21 +00:00
AArch64InstrInfo.h [Outliner] Add outliner for AArch64 2017-03-17 22:26:55 +00:00
AArch64InstrInfo.td [AArch64] [Assembler] option to disable negative immediate conversions 2017-03-28 10:02:56 +00:00
AArch64InstructionSelector.cpp [GlobalISel][AArch64] Extract a variable out of an NDEBUG block. NFC. 2017-03-27 18:14:20 +00:00
AArch64InstructionSelector.h [GlobalISel][AArch64] Select CBZ. 2017-03-27 16:35:31 +00:00
AArch64ISelDAGToDAG.cpp [AArch64] Add new subtarget feature to fold LSL into address mode. 2017-03-31 18:16:53 +00:00
AArch64ISelLowering.cpp [DAGCombiner] Add vector demanded elements support to computeKnownBitsForTargetNode 2017-03-31 11:24:16 +00:00
AArch64ISelLowering.h [DAGCombiner] Add vector demanded elements support to computeKnownBitsForTargetNode 2017-03-31 11:24:16 +00:00
AArch64LegalizerInfo.cpp GlobalISel: constrain G_INSERT to inserting just one value per instruction. 2017-03-03 23:05:47 +00:00
AArch64LegalizerInfo.h GlobalISel: legalize va_arg on AArch64. 2017-02-15 23:22:50 +00:00
AArch64LoadStoreOptimizer.cpp [AArch64] Use alias analysis in the load/store optimization pass. 2017-03-17 14:19:55 +00:00
AArch64MachineFunctionInfo.h [AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2017-01-06 00:30:53 +00:00
AArch64MacroFusion.cpp [AArch64, X86] Additional debug information for MacroFusion 2017-03-10 20:20:04 +00:00
AArch64MacroFusion.h [CodeGen] Move MacroFusion to the target 2017-02-01 02:54:34 +00:00
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp
AArch64RedundantCopyElimination.cpp [AArch64][Redundant Copy Elim] Add support for CMN and shifted imm. 2017-03-06 21:20:00 +00:00
AArch64RegisterBankInfo.cpp GlobalISel: fall back gracefully when we can't map an operand's size. 2017-02-06 21:57:06 +00:00
AArch64RegisterBankInfo.h GlobalISel: fall back gracefully when we can't map an operand's size. 2017-02-06 21:57:06 +00:00
AArch64RegisterBanks.td Re-commit: [globalisel] Tablegen-erate current Register Bank Information 2017-01-19 11:15:55 +00:00
AArch64RegisterInfo.cpp AArch64RegisterInfo: Simplify getReservedReg(); NFC 2017-02-02 02:23:25 +00:00
AArch64RegisterInfo.h
AArch64RegisterInfo.td
AArch64SchedA53.td [MachineScheduler] Reference the correct header. 2017-03-26 21:27:21 +00:00
AArch64SchedA57.td [AArch64] Add new subtarget feature to fuse AES crypto operations 2017-02-01 02:54:39 +00:00
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64SchedFalkor.td [AArch64] Refine Falkor Machine Model - Part1 2017-03-25 04:02:39 +00:00
AArch64SchedFalkorDetails.td [AArch64] Refine Falkor Machine Model - Part1 2017-03-25 04:02:39 +00:00
AArch64SchedFalkorWriteRes.td [AArch64] Refine Falkor Machine Model - Part1 2017-03-25 04:02:39 +00:00
AArch64SchedKryo.td
AArch64SchedKryoDetails.td [AArch64] Refine Kryo Machine Model 2017-01-26 20:10:41 +00:00
AArch64SchedM1.td [AArch64] Add new subtarget feature to fuse AES crypto operations 2017-02-01 02:54:39 +00:00
AArch64SchedThunderX2T99.td [AArch64] Vulcan is now ThunderXT99 2017-03-07 19:42:40 +00:00
AArch64SchedThunderX.td [AArch64] Vulcan is now ThunderXT99 2017-03-07 19:42:40 +00:00
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp [AArch64] Drive-by cleanup, make this code shorter. NFCI. 2017-03-22 23:37:58 +00:00
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp [AArch64] Vulcan is now ThunderXT99 2017-03-07 19:42:40 +00:00
AArch64Subtarget.h [AArch64] Add new subtarget feature to fold LSL into address mode. 2017-03-31 18:16:53 +00:00
AArch64SystemOperands.td AArch64InstPrinter: rewrite of printSysAlias 2017-02-27 14:45:34 +00:00
AArch64TargetMachine.cpp [GlobalISel] Add a way for targets to enable GISel. 2017-03-01 23:33:08 +00:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp TTI: Split IsSimple in MemIntrinsicInfo 2017-03-24 18:56:43 +00:00
AArch64TargetTransformInfo.h [TargetTransformInfo] Refactor and improve getScalarizationOverhead() 2017-01-26 07:03:25 +00:00
AArch64VectorByElementOpt.cpp [AArch64] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2017-01-25 00:29:26 +00:00
CMakeLists.txt [CodeGen] Move MacroFusion to the target 2017-02-01 02:54:34 +00:00
LLVMBuild.txt