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df3e0498f9
Run EarlyCSE before ParallelDSP and do this in the backend IR opt phase. Differential Revision: https://reviews.llvm.org/D59257 llvm-svn: 356130
19 lines
529 B
LLVM
19 lines
529 B
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -arm-atomic-cfg-tidy=0 -O2 | FileCheck %s
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; rdar://7493908
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; Make sure the result of the first dynamic_alloc isn't copied back to sp more
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; than once. We'll deal with poor codegen later.
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define void @t() nounwind ssp {
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entry:
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; CHECK-LABEL: t:
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%size = mul i32 8, 2
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; CHECK: sub.w r0, sp, #16
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; CHECK: mov sp, r0
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%vla_a = alloca i8, i32 %size, align 8
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; CHECK: sub.w r0, sp, #16
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; CHECK: mov sp, r0
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%vla_b = alloca i8, i32 %size, align 8
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unreachable
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}
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