Piotr Sobczak 3a8e847d39 [AMDGPU] Select s_cselect ...

Summary:
Add patterns to select s_cselect in the isel.

Handle more cases of implicit SCC accesses in si-fix-sgpr-copies
to allow new patterns to work.

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, asbirlea, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81925

2020-06-19 16:17:46 +02:00

..

AArch64

[SVE] Fall back on DAG ISel at -O0 when encountering scalable types

2020-06-19 10:57:00 +01:00

AMDGPU

[AMDGPU] Select s_cselect

2020-06-19 16:17:46 +02:00

ARC

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ARM

[ARM][BFloat] Implement lowering of bf16 load/store intrinsics

2020-06-19 14:02:35 +00:00

AVR

[AVR] Fix miscompilation of zext + add

2020-06-18 16:51:37 +02:00

BPF

[BPF] fix a bug for BTF pointee type pruning

2020-06-17 15:13:46 -07:00

Generic

[LLParser] Delete temp CallInst when error occurs

2020-06-16 11:41:25 +08:00

Hexagon

Simplify MachineVerifier's block-successor verification.

2020-06-06 22:30:51 -04:00

Inputs

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Lanai

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Mips

[DAGCombine] Generalize the case (add (or x, c1), c2) -> (add x, (c1 + c2))

2020-06-12 13:53:08 -04:00

MIR

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MSP430

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NVPTX

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PowerPC

[PowerPC] Canonicalize shuffles to match more single-instruction masks on LE

2020-06-18 21:54:22 -05:00

RISCV

[RISCV64] Emit correct lib call for fp(float/double) to ui/si

2020-06-18 19:34:16 +05:30

SPARC

[SPARC] Lower fp16 ops to libcalls

2020-06-10 19:15:26 -07:00

SystemZ

[SystemZ] Bugfix in storeLoadCanUseBlockBinary().

2020-06-17 09:49:31 +02:00

Thumb

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Thumb2

[ARM][MVE] tail-predication: renamed internal option.

2020-06-19 15:07:06 +01:00

VE

[VE] Support relocation information in MC layer

2020-06-15 11:24:53 +02:00

WebAssembly

[WebAssembly] MC: Fix for data aliases with offsets (getelementptr)

2020-06-17 16:25:50 -07:00

WinCFGuard

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WinEH

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X86

[X86][SSE] Add tests for (missing) MOVMSK(PCMPEQ(X,0)) != -1 -> PTESTZ(X,X) allof folds

2020-06-19 14:11:46 +01:00

XCore

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