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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
llvm-mirror/include/llvm/Target
Matt Arsenault 3a92d93149 CodeGen: Move undef_tied_input declaration
This doesn't belong in ARM specific code since it's generally
recognized by tablegen.
2020-02-18 10:33:10 -08:00
..
GlobalISel [GlobalISel] Add new combine to convert scalar G_MUL to G_SHL. 2020-01-29 13:39:00 -08:00
CodeGenCWrappers.h Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
GenericOpcodes.td GlobalISel: Assume G_INTRINSIC* are convergent 2020-02-05 10:17:22 -08:00
Target.td CodeGen: Move undef_tied_input declaration 2020-02-18 10:33:10 -08:00
TargetCallingConv.td Add Windows Control Flow Guard checks (/guard:cf). 2019-10-28 15:19:39 +00:00
TargetInstrPredicate.td Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
TargetIntrinsicInfo.h Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
TargetItinerary.td [DFAPacketizer] Allow namespacing of automata per-itinerary 2019-08-30 19:50:49 +00:00
TargetLoweringObjectFile.h [NFC][XCOFF] Refactor Csect creation into TargetLoweringObjectFile 2020-01-22 12:09:11 -05:00
TargetMachine.h Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" 2020-02-18 16:38:11 +01:00
TargetOptions.h Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" 2020-02-18 16:38:11 +01:00
TargetPfmCounters.td Update the file headers across all of the LLVM projects in the monorepo 2019-01-19 08:50:56 +00:00
TargetSchedule.td [Tblgen][MCA] Add the ability to mark groups as LoadQueue and StoreQueue. NFCI 2019-08-27 18:20:34 +00:00
TargetSelectionDAG.td [SEH] Remove CATCHPAD SDNode and X86::EH_RESTORE MachineInstr 2020-02-04 15:13:12 -08:00